參數(shù)資料
型號: ZPSD813F1V
英文描述: Flash In System Programmable Mirocomputer Peripherals(閃速,在系統(tǒng)可編程微控制器外圍器件,1M位閃速存儲器,256K位EEPROM,16K位SRAM)
中文描述: Flash在系統(tǒng)可編程Mirocomputer外設(shè)(閃速,在系統(tǒng)可編程微控制器外圍器件,100萬位閃速存儲器,256K位的EEPROM,16K的位的SRAM)
文件頁數(shù): 126/130頁
文件大?。?/td> 650K
代理商: ZPSD813F1V
PSD813F Family
Preliminary
122
Temporary
Exceptions to
Specifications
The following information describes exceptions to specifications contained in this data
sheet. These exceptions will be corrected in future releases of PSD813F products. Please
note the device markings for which these exceptions apply.
For PSD813F devices marked
ES3
on the topside, the following specification
exceptions apply.
1. The
TURBO OFF
adder parameter has changed (5V ZPSD813Fx devices only).
Normal Operation
When the 5V ZPSD813F device is operated in non-turbo mode, the
amount of propagation delay in the CPLD, and the memory access times, are increased
by the
TURBO OFF
adder parameter of 10 nsec, as listed throughout the AC/DC
Parameter section.
Discrepancy
The value of the
TURBO OFF
adder for 5V ZPSD813F devices
has increased from 10 nsec to 15 nsec. When viewing the 5V AC/DC Parameter
specifications, replace any occurrence of 10 nsec for the
TURBO OFF
adder
parameter with 15 nsec.
2. The User Code feature of IEEE 1149.1 is not supported via the PSD JTAG channel.
(PSD813Fx, ZPSD813Fx, and ZPSD813FxV devices)
Normal Operation
The PSD813F provides 32 bits of non-volatile memory
(User Code), to allow the user to store information. Typical uses are product ID,
product software revision information, etc. Read and Write access is available through
a stand-alone device programmer (like PSDpro) or the IEEE 1149.1 JTAG channel.
The microcontroller does not have access.
Discrepancy
The user code information cannot be accessed through the PSD JTAG
channel. However, it can be accessed using a device programmer (like PSDpro).
3. Initial enabling of Software Data Protect (SDP) mode requires writing data to a
reserved memory space. (PSD813F1 and ZPSD813F1 only)
Normal Operation
The Software Data Protect (SDP) mode for EEPROM can be set
when the microcontroller (MCU) writes a three byte command sequence to the EEPROM
per Table 9. Once SDP mode is set, any further writes to EEPROM must be proceeded
by these same three command bytes to
unlock
the EEPROM per Figure 3. This offers
data protection much like that of flash memory.
SDP mode may be enabled when the MCU initializes the system, and left on all the time
for maximum protection. Alternately, SDP mode may be disabled before writing blocks of
data to EEPROM, and enabled after writing. This method still offers good protection
without the time penalty of writing AAh, 55h, A0h before each set of data.
The MCU can enable SDP mode by either of two methods:
1) write three command bytes and no data (AAh,55h, A0h) as shown in table 9.
2) write three command bytes followed by one or more actual data bytes to be written
into the EEPROM (AAh, 55h, A0h, data1, data2, .... data64), also shown in Table 9
SDP mode is controlled by a programmable non-volatile (NVM) bit inside the PSD.
Once SDP mode is enabled, it will stay enabled until the MCU or a device programmer
erases the NVM bit. PSD813F devices are shipped from Waferscale with SDP mode
not enabled.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZPSD813F1V-15J 制造商:WSI 功能描述:
ZPSD813F1V-15J-CC790 制造商:STMicroelectronics 功能描述:Flash In SystemProgrammable Mirocomputer Peripherals
ZPSD813F1V-20J 制造商:WSI 功能描述:
ZPSD813F2-12JI 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52
ZPSD813F2-12UI 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP64