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參數(shù)資料
| 型號： | ZPSD813F1V |
| 英文描述： | Flash In System Programmable Mirocomputer Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位閃速存儲器，256K位EEPROM，16K位SRAM) |
| 中文描述： | Flash在系統(tǒng)可編程Mirocomputer外設(shè)（閃速，在系統(tǒng)可編程微控制器外圍器件，100萬位閃速存儲器，256K位的EEPROM，16K的位的SRAM） |
| 文件頁數(shù)： | 25/130頁 |
| 文件大小： | 650K |
| 代理商： | ZPSD813F1V |
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Prelimnary
PSD813F Famly
21
The
PSD813F
Functional
Blocks
(cont.)
9.1.1.5.6 Data Polling Flag DQ7
When Erasing or Programming the Flash memory (or when Writing into the EEPROM
memory), bit DQ7 outputs the complement of the bit being entered for Programming/Writing
on DQ7. Once the Program instruction or the Write operation is completed, the true logic
value is read on DQ7 (in a Read operation). Flash memory specific features:
J
Data Polling is effective after the fourth Write pulse (for programming) or after the
sixth Write pulse (for Erase). It must be performed at the address being programmed
or at an address within the Flash sector being erased.
J
During an Erase instruction, DQ7 outputs a ‘0’. After completion of the instruction,
DQ7 will output the last bit programmed (it is a ‘1’ after erasing).
J
If the byte to be programmed is in a protected Flash sector, the instruction is
ignored.
J
If all the Flash sectors to be erased are protected, DQ7 will be set to ‘0’ for about
100 μs, and then return to the previous addressed byte. No erasure will be performed.
9.1.1.5.7 Toggle Flag DQ6
The PSD813F offers another way for determining when the EEPROM write or the Flash
memory Program instruction is completed. During the internal Write operation and when
either the FSi or EESi/CSBOOTi is true, the DQ6 will toggle from ‘0’ to ‘1’ and ‘1’ to ‘0’ on
subsequent attempts to read any byte of the memory.
When the internal cycle is complete, the toggling will stop and the data read on the
Data Bus D0-7 is the addressed memory byte. The device is now accessible for a new
Read or Write operation. The operation is finished when two successive reads yield the
same output data. Flash memory specific features:
J
The Toggle bit is effective after the fourth Write pulse (for programming) or after the
sixth Write pulse (for Erase).
J
If the byte to be programmed belongs to a protected Flash sector, the instruction is
ignored.
J
If all the Flash sectors selected for erasure are protected, DQ6 will toggle to ‘0’ for
about 100 μs and then return to the previous addressed byte.
9.1.1.5.8 Error Flag DQ5
During a correct Program or Erase, the Error bit will set to ‘0’. This bit is set to ‘1’ when
there is a failure during Flash byte programming, Sector erase, or Bulk Erase.
In the case of Flash programming, the Error Bit indicates the attempt to program a Flash
bit(s) from the programmed state (0) to the erased state (1), which is not a valid operation.
The Error bit may also indicate a timeout condition while attempting to program a byte.
In case of an error in Flash sector erase or byte program, the Flash sector in which the
error occurred or to which the programmed byte belongs must no longer be used.
Other Flash sectors may still be used. The Error bit resets after the Reset instruction.
9.1.1.5.9 Erase Time-out Flag DQ3 (Flash Memory only)
The Erase Timer bit reflects the time-out period allowed between two consecutive Sector
Erase instructions. The Erase timer bit is set to ‘0’ after a Sector Erase instruction for a time
period of 100 μs + 20% unless an additional Sector Erase instruction is decoded. After this
time period or when the additional Sector Erase instruction is decoded, DQ3 is set to ‘1’.
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相關(guān)代理商/技術(shù)參數(shù) |
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| ZPSD813F1V-15J | 制造商:WSI 功能描述: |
| ZPSD813F1V-15J-CC790 | 制造商:STMicroelectronics 功能描述:Flash In SystemProgrammable Mirocomputer Peripherals |
| ZPSD813F1V-20J | 制造商:WSI 功能描述: |
| ZPSD813F2-12JI | 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52 |
| ZPSD813F2-12UI | 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP64 |
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