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參數(shù)資料
| 型號： | ZPSD813F1V |
| 英文描述： | Flash In System Programmable Mirocomputer Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位閃速存儲器，256K位EEPROM，16K位SRAM) |
| 中文描述： | Flash在系統(tǒng)可編程Mirocomputer外設(shè)（閃速，在系統(tǒng)可編程微控制器外圍器件，100萬位閃速存儲器，256K位的EEPROM，16K的位的SRAM） |
| 文件頁數(shù)： | 46/130頁 |
| 文件大?。?/td> | 650K |
| 代理商： | ZPSD813F1V |
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PSD813F Famly
Prelimnary
42
9.2.2.2 The Product TermAllocator
The CPLD has a Product Term Allocator. The PSDabel compiler uses the Allocator to
borrow and place product terms from one Micro
Cell to another. The following list
summarizes how product terms are allocated:
McellAB0-7 all have three native product terms and may borrow up to six more
McellBC0-3 all have four native product terms and may borrow up to five more
McellBC4-7 all have four native product terms and may borrow up to six more.
Each Micro
Cell may only borrow product terms from certain other Micro
Cells. Product
terms already in use by one Micro
Cell will not be available for a different Micro
Cell.
If an equation requires more product terms than what is available to it, then “external”
product terms will be required, which will consume other OMCs. If external product terms
are used, extra delay will be added for the equation that required the extra product terms.
This is called product term expansion. PSDsoft will perform this expansion as needed.
9.2.2.3 Loading and Reading the Output Micro
Cells (OMCs)
The OMCs occupy a memory location in the MCU address space, as defined by the
CSIOP (refer to the I/O section). The flip-flops in each of the 16 OMCs can be loaded from
the data bus by a microcontroller. Loading the OMCs with data from the MCU takes priority
over internal functions. As such, the preset, clear, and clock inputs to the flip-flop can be
overridden by the MCU. The ability to load the flip-flops and read them back is useful in
such applications as loadable counters and shift registers, mailboxes, and handshaking
protocols.
Data can be loaded to the OMCs on the trailing edge of the WR signal (edge loading) or
during the time that the WR signal is active (level loading). The method of loading is
specified in PSDsoft Configuration.
9.2.2.4 The OMC Mask Register
There is one Mask Register for each of the two groups of eight OMCs. The Mask Registers
can be used to block the loading of data to individual OMCs. The default value for the Mask
Registers is 00h, which allows loading of the OMCs. When a given bit in a Mask Register is
set to a ‘1’, the MCU will be blocked from writing to the associated OMC. For example,
suppose McellAB0-3 are being used for a state machine. You would not want a MCU write
to McellAB to overwrite the state machine registers. Therefore, you would want to load the
Mask Register for McellAB (Mask Micro
Cell AB) with the value 0Fh.
9.2.2.5 The Output Enable of the OMC
The OMC can be connected to an I/O port pin as a PLD output. The output enable of each
Port pin driver is controlled by a single product term from the AND array, ORed with the
Direction Register output. The pin is enabled upon power up if no output enable equation is
defined and if the pin is declared as a PLD output in PSDsoft.
If the OMC output is declared as an internal node and not as a Port pin output in the
PSDabel file, then the Port pin can be used for other I/O functions. The internal node
feedback can be routed as an input to the AND array.
The
PSD813F
Functional
Blocks
(cont.)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| ZPSD813F1V-15J | 制造商:WSI 功能描述: |
| ZPSD813F1V-15J-CC790 | 制造商:STMicroelectronics 功能描述:Flash In SystemProgrammable Mirocomputer Peripherals |
| ZPSD813F1V-20J | 制造商:WSI 功能描述: |
| ZPSD813F2-12JI | 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52 |
| ZPSD813F2-12UI | 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP64 |
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