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XRT94L33
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Rev.1.2.0.
299
2.2.9.5
TRANSMISSION OF ALARM CONDITIONS
The Transmit STS-3 TOH Processor Block supports the following functions.
Transmitting the LOS (Loss of Signal) pattern (under Software control)
Transmitting the AIS-L Pattern (under Software control)
Transmitting the RDI-L Indicator (automatically and under Software control)
Transmitting the REI-L Indicator (automatically and under Software control)
Each of these functions is discussed in some detail below.
2.2.9.5.1
TRANSMISSION OF THE LOS CONDITION
The Transmit STS-3 TOH Processor block permits the user to transmit the LOS pattern to the remote terminal
equipment. The user can accomplish this by setting Bit 3 (LOS Force) within the Transmit STS-3 Transport –
SONET Transmit Control Register – Byte 0, as illustrated below.
Transmit STS-3 Transport – SONET Transmit Control Register – Byte 0 (Address = 0x1902)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
M0M1 Insert
Method[0]
Unused
RDI-L Force
AIS-L Force
LOS
Force
Scramble
Enable
B2 Error
Insert
A1A2 Error
Insert
R/W
R/O
R/W
0
1
0
Once the user executes this step, then the Transmit STS-3 TOH block will override all of the outbound data,
with an “All Zeros” pattern.
Note:
When this bit-field is set, it overrides all of the other bits in this register.
2.2.9.5.2
TRANSMISSION OF AIS-L INDICATOR
The Transmit STS-3 TOH Processor block permits the user to transmit the AIS-L (Line – Alarm Indication
Signal) indicator to the remote terminal equipment, under software control.
Forced Transmission of the AIS-L Indicator
The user can command the Transmit STS-3 TOH Processor block to transmit the AIS-L indicator by setting
Bit 4 (AIS-L Force) within the Transmit STS-3 Transport – SONET Transmit Control Register – Byte 0, to “1”
as illustrated below.
Transmit STS-3 Transport – SONET Transmit Control Register – Byte 0 (Address = 0x1902)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
M0M1 Insert
Method[0]
Unused
RDI-L Force
AIS-L Force
LOS Force
Scramble
Enable
B2 Error
Insert
A1A2 Error
Insert
R/W
R/O
R/W
0
1
0
Once the user executes this step, then the Transmit STS-3 TOH Processor Block will overwrite all of the Line
Overhead, and STS-3 Envelope Capacity bytes, with an “All Ones” pattern. Only the Section Overhead bytes
will be unaffected by this register bit setting.
Note:
This bit-field is ignored when the “LOS Force” bit-field is set to “1”.