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XRT94L33
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Rev.1.2.0.
263
2.2.8.3.2.7
Configuring the Transmit SONET POH Processor block to automatically transmit RDI-
P, in response to declaration of the LCD-P Condition
The user can configure the Transmit SONET POH Processor block to automatically transmit the RDI-P
indicator, in response to the corresponding Receive SONET POH Processor block declaring the LCD-P
condition, by executing the following steps.
STEP 1- Write the appropriate value into Bit 7 through 5 (LCD-P RDI-P Code[2:0]) within the “Transmit
SONET Path – RDI-P Control Register – Byte 2” as illustrated below.
Transmit SONET Path – RDI-P Control Register – Byte 2 (Address = 0xN9C9)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
LCD-P RDI-P Code[2:0]
Transmit
RDI-P upon
LCD-P
PLM-P RDI-P Code[2:0]
Transmit
RDI-P upon
PLM-P
R/W
X
0
X
0
By writing this particular value into these three bit-fields, the user is specifying the values that the “Transmit
SONET POH Processor” block will set the RDI-P bit-fields (within the outbound G1 byte) to, whenever the
corresponding Receive SONET POH Processor block declares the LCD-P condition.
STEP 2 – Set Bit 4 (Transmit RDI-P upon LCD-P) within the “Transmit SONET Path – RDI-P Control
Registers – Byte 2” to “1”, as illustrated below.
Transmit SONET Path – RDI-P Control Register – Byte 2 (Address = 0xN9C9)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
LCD-P RDI-P Code[2:0]
Transmit
RDI-P upon
LCD-P
PLM-P RDI-P Code[2:0]
Transmit
RDI-P upon
PLM-P
R/W
X
1
X
0
2.2.8.3.2.8
Configuring the Transmit SONET POH Processor block to transmit the RDI-P indicator,
upon Software Control
The user can configure the Transmit SONET POH Processor block to transmit the RDI-P (per software
command) by executing the following steps.
STEP 1 – Write the value “[0, 1]” into Bits 3 and 4 (RDI-P Insertion Type[1:0]) within the “Transmit
SONET Path – SONET Control Register – Byte 0”, as depicted below.
Transmit SONET Path – SONET Control Register – Byte 0 (Address = 0xN983)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
F2 Insertion
Type
REI-P Insertion Type[1:0]
RDI-P Insertion Type[1:0]
C2 Byte
Insertion
Type
Unused
Transmit
AIS-P
Enable
R/W
R/O
R/W
0
1
0
This step configures the “Transmit SONET POH Processor” block to automatically read out the contents of
bits 3 through 1 (of the “Transmit SONET Path – G1 Byte Value” register); and write the value of these bits