
XRT84L38
40
OCTAL T1/E1/J1 FRAMER
REV. 1.0.1
5.
Further, the μC/μP should indicate that this cycle is a Read cycle by setting the
WR_R/W
(R/W*) input pin
"High".
6.
Next the μC/μP should initiate the current bus cycle by toggling the RD_DS (Data Strobe) input pin "Low".
This step enables the bi-directional data bus output drivers, within the Framer. At this point, the bi-direc-
tional data bus output drivers will proceed to drive the contents of the Address register onto the bi-direc-
tional data bus, D[7:0].
7.
After some settling time, the data on the bi-directional data bus will stabilize and can be read by the μC/μP.
The Framer will indicate that this data can be read by asserting the RDY_DTACK (DTACK) signal “Low”.
8.
After the μC/μP detects the RDY_DTACK signal (from the Framer) it will terminate the Read Cycle by tog-
gling the RD_DS (Data Strobe) input pin "High".
Figure 6
presents a timing diagram which illustrates the behavior of the Microprocessor Interface signals
during a Motorola-type Programmed I/O Read Operation.
1.3.2.2.2.2
Whenever a Motorola-type μC/μP wishes to write a byte or word of data into a register or buffer location, within
the Framer, it should do the following.
1.
Assert the ALE_AS (Address Select) input pin by toggling it "Low". This step enables the Address Bus
input drivers (within the Framer chip).
2.
Place the address of the target register or buffer location (within the Framer), on the Address Bus input
pins, A[6:0].
3.
While the μC/μP is placing this address value onto the Address Bus, the Address-Decoding circuitry (within
the user's system) should assert the CS (Chip Select) input pins of the Framer by toggling it "Low". This
step enables further communication between the μC/μP and the Framer Microprocessor Interface block.
4.
After allowing the data on the Address Bus pins to settle (by waiting the appropriate Address Setup time),
the μC/μP should toggle the ALE_AS input pin "High". This step causes the Framer to latch the contents of
the Address Bus into its own circuitry. At this point, the Address of the register or buffer location (within the
Framer), has now been selected.
5.
Further, the μC/μP should indicate that this current bus cycle is a Write operation by toggling the
WR_R/W
(R/W*) input pin "Low".
6.
The μC/μP should then place the byte or word that it intends to write into the target register, on the bi-direc-
tional data bus, D[7:0].
Motorola Mode Write Cycle
F
IGURE
6. M
OTOROLA
μP I
NTERFACE
SIGNALS
DURING
A
P
ROGRAMMED
I/O R
EAD
O
PERATION
ALE_AS
A[6:0]
CS
D[7:0]
RD_DS
WR_R/W
RDY_DTACK
Not Valid
Address of target Register
Valid Data