
XRT84L38
359
REV. 1.0.1
Busy tone
OCTAL T1/E1/J1 FRAMER
A signal is consists of four bits namely A, B, C and D. These bits define the state of the call for a particular time
slot. The time slot 16 octet of each E1 frame can carry CAS signals for two E1 voice or data channels.
Therefore, sixteen E1 frames are needed to carry CAS signals for all 32 E1 channels. The sixteen E1 frames
then forms a CAS Multi-frame.
The time slot 16 of Frame number 0 of an E1 CAS Multi-frame carries the pattern of "0000 XYXX". The time
slot 16 of Frame number 1 carries signals of Channel 1 and Channel 17. The time slot 16 of Frame number 2
carries signals of Channel 2 and Channel 18, and so on. The following table shows the bit allocations of
Channel Associated Signaling in E1 framing format.
The four zeros pattern is the multi-frame alignment signal that indicates the beginning of an E1 CAS Multi-
frame. The XRT84L38 framer, upon detection of the four zeros pattern in the time slot 16, declares CAS multi-
frame synchronization and would pulse the Receive CAS Multi-frame Synchronization pulse (RxCASMSync_n)
HIGH for one clock period. The user, triggering on the Receive CAS Multi-frame Synchronization pulse, would
thus identify the received CAS Multi-frame boundary.
The X in XYXX pattern located in the time slot 16 of Frame number 0 should be fixed to "1" and can be used to
prevent mimicking of CAS Multi-frame alignment pattern.
The Y in XYXX pattern is used for alarm indication of time slot 16 to the remote terminal. If signals of time slot
16 is transmitted and received correctly, the Y bit is set to "0". In an alarm condition, the Y bit is set to "1".
Therefore, Y bit is also known as CAS Multi-frame yellow alarm.
11.4.3
Configure the framer to transmit Channel Associated Signaling
The XRT84L38 framer supports transmission of Common Channel Signaling and Channel Associated
Signaling according to ITU-T Recommendation G.704. As discussed briefly before, Channel Associated
Signaling includes the signaling bits, the CAS Multi-frame Alignment pattern and the X and Y bits.
Signaling bits can be inserted into the outgoing E1 frame through the following:
T
IME
SLOT
16
OF
F
RAME
0
T
IME
SLOT
16
OF
F
RAME
1
T
IME
SLOT
16
OF
F
RAME
2
T
IME
SLOT
16
OF
F
RAME
3
0000
XYXX
ABCD of
Ch. 1
ABCD of
Ch. 17
ABCD of
Ch. 2
ABCD of
Ch. 18
ABCD of
Ch. 3
ABCD of
Ch. 19
T
IME
SLOT
16
OF
F
RAME
4
T
IME
SLOT
16
OF
F
RAME
5
T
IME
SLOT
16
OF
F
RAME
6
T
IME
SLOT
16
OF
F
RAME
7
ABCD of
Ch. 4
ABCD of
Ch. 20
ABCD of
Ch. 5
ABCD of
Ch. 21
ABCD of
Ch. 6
ABCD of
Ch. 22
ABCD of
Ch. 7
ABCD of
Ch. 23
T
IME
SLOT
16
OF
F
RAME
8
T
IME
SLOT
16
OF
F
RAME
9
T
IME
SLOT
16
OF
F
RAME
10
T
IME
SLOT
16
OF
F
RAME
11
ABCD of
Ch. 8
ABCD of
Ch. 24
ABCD of
Ch. 9
ABCD of
Ch. 25
ABCD of
Ch. 10
ABCD of
Ch. 26
ABCD of
Ch. 11
ABCD of
Ch. 27
T
IME
SLOT
16
OF
F
RAME
12
T
IME
SLOT
16
OF
F
RAME
13
T
IME
SLOT
16
OF
F
RAME
14
T
IME
SLOT
16
OF
F
RAME
15
ABCD of
Ch. 12
ABCD of
Ch. 28
ABCD of
Ch. 13
ABCD of
Ch. 29
ABCD of
Ch. 14
ABCD of
Ch. 30
ABCD of
Ch. 15
ABCD of
Ch. 31