
XRT84L38
341
REV. 1.0.1
OCTAL T1/E1/J1 FRAMER
The extraction of signaling bit from DS1 PCM data is done on a per-channel basis. The Bit 3 of RSRA register
is used to hole Signaling bit A. Bit 2 is used to hold Signaling bit B. Bit 1 is used to hold Signaling bit C. Bit 0 is
used to hold Signaling bit D.
The table below shows the four least significant bits of the Receive Signaling Register Array.
RECEIVE SIGNALING REGISTER ARRAY (RSRA) (INDIRECT ADDRESS = 0XN4H, 0X00H - 0X17H)
10.5.1.2
Outputting Signaling Bits through RxSig_n Pin
The XRT84L38 framer can be configure to output extracted signaling bits to external equipment through the
RxSig_n pins. This pin is a multiplexed I/O pin with two functions:
RxTSb[0]_n - Receive Timeslot Number Bit [0] Output pin
RxSig_n - Receive Signaling Output pin
When the Receive Fractional DS1 bit of the Receive Interface Control Register (TICR) is set to 0, this pin is
configured as RxTSb[0]_n pin, it outputs bit 0 of the timeslot number of the DS1 PCM data that is receiving.
When the Receive Fractional DS1 bit of the Receive Interface Control Register (TICR) is set to 1, this pin is
configured as RxSig_n pin, it acts as an output source for the signaling bits to be received in the inbound DS1
frames.
The table below shows configurations of the Receive Fractional DS1 bit of the Receive Interface Control
Register (TICR).
RECEIVE INTERFACE CONTROL REGISTER (TICR) (INDIRECT ADDRESS = 0XN0H, 0X20H)
Figure 116
below is a timing diagram of the RxSig_n output pin. Please note that the Signaling Bit A of a
certain timeslot coincides with Bit 3 of the Received serial output data; Signaling Bit B coincides with Bit 2 of
B
IT
N
UMBER
B
IT
N
AME
B
IT
T
YPE
B
IT
D
ESCRIPTION
3
Signaling Bit A
R/W
This bit is used to store Signaling Bit A that is received and extracted as
the least significant bit of timeslot of frame number 6.
2
Signaling Bit B
R/W
This bit is used to store Signaling Bit B that is received and extracted as
the least significant bit of timeslot of frame number 12.
1
Signaling Bit C
R/W
This bit is used to store Signaling Bit C that is received and extracted as
the least significant bit of timeslot of frame number 18.
0
Signaling Bit D
R/W
This bit is used to store Signaling Bit D that is received and extracted as
the least significant bit of timeslot of frame number 24.
B
IT
N
UMBER
B
IT
N
AME
B
IT
T
YPE
B
IT
D
ESCRIPTION
4
Receive Fractional
DS1
R/W
This READ/WRITE bit-field permits the user to determine which one of the
two functions the multiplexed I/O pin of RxTSb[0]_n/RxSig_n is spotting.
0 - This pin is configured as RxTSb[0]_n pin, it outputs bit 0 of the timeslot
number of the DS1 PCM data that is receiving.
1 - This pin is configured as RxSig_n pin, it acts as an output source for the
signaling bits to be received in the inbound DS1 frames