
XRT84L38
250
OCTAL T1/E1/J1 FRAMER
REV. 1.0.1
When the Transmit Fractional E1 Input Enable bit is equal to one, the TxTSb[0]_n bit becomes the Transmit
Fractional E1 Input signal (TxFrTD_n). This input pin carries Fractional E1 Input data to be inserted into the
outbound E1 data stream. The Fraction E1 Input Interface allows certain time-slots of outbound E1 data stream
to have a different source other than the local Terminal Equipment. Function of the Fractional E1 Input signal
will be discussed in details in later sections.
When the Transmit Fractional E1 Input Enable bit is equal to one, the TxTSb[1]_n bit becomes the Transmit
Signaling Data Input signal (TxSig_n). These input pins can be used to insert robbed-bit signaling data into the
outbound E1 frame. Function of the Transmit Signaling Data Input signal will be discussed in details in later
sections.
When the Transmit Fractional E1 Input Enable bit is equal to one, the TxTSb[2]_n bit serially outputs all five-bit
binary values of the Time Slot number (0-31) being accepted and processed by the Transmit Payload Data
Input Interface block of the framer. MSB of the binary value is presented first and the LSB is presented last.
When the Transmit Fractional E1 Input Enable bit is equal to one, the TxTSb[3]_n bit becomes the Transmit
Overhead Synchronization Pulse (TxOHSync_n). These pins can be used to output an Overhead
Synchronization Pulse that indicates the first bit of each E1multi-frame. Function of the Transmit Overhead
Synchronization Output signal will be discussed in details in later sections.
The TxTSb[4]_n bit is not multiplexed.
The table below shows functionality of the TxTSb[3:0] bits when the Transmit Fractional E1 Input bit is set to
different values.
The Transmit Time-slot Indicator Clock signal (TxTSClk_n) is a multi-function output pin. When configured to
operate in normal condition (that is, when the Transmit Fractional E1 Input Enable bit is equal to zero), the
TxTSClk_n is a 256KHz clock that pulses HIGH for one E1 bit period whenever the Transmit Payload Data
Input Interface block is accepting the LSB of each of the twenty-four time slots. The local Terminal Equipment
should use this clock signal to sample the TxTSb[0] through TxTSb[4] bits and identify the time-slot being
processed via the Transmit Section of the framer.
When the Transmit Fractional E1 Input Enable bit is equal to one, the TxTSClk_n will output gaped fractional
E1 clock at time-slots where Fractional E1 Input data is present. This clock can be used by Terminal Equipment
to clock out Fractional E1 payload data at rising edge of the clock. The framer will then input Fractional E1
payload data using falling edge of the clock. Otherwise, this pin can be configured as a clock enable signal to
Transmit Fractional E1 Input signal (TxFrTD_n) if the framer is set accordingly. In this way, Fractional E1
payload data is clocked into the framer using un-gaped Transmit Serail Input Clock (TxSerClk_n). A detailed
discussion of the Fractional E1 Payload Data Input Interface can be found in later sections.
Both the Transmit Time-slot Indicator Clock (TxTSClk_n) and the Transmit Time-slot Indication Bits
(TxTSbb[4:0]_n) are output signals in normal 2.048Mbit/s Back-plane mode regardless of the timing source of
the Transmit Section of framer.
A detailed discussion of how to connect the Transmit Payload Data Input Interface block to the local Terminal
Equipment using different timing sources can be found in the later sections.
6.1.2.1
Connect the Transmit Payload Data Input Interface block to the Local Terminal Equipment
if Transmit Timing Source = TxSerClk_n
By setting the Transmit Timing Source [1:0] bits of the Clock Select Register to 01, the TxSerClk_n input signal
is configured to be the timing source for the Transmit section of the framer. The Terminal Equipment should
T
RANSMIT
F
RACTIONAL
E1 I
NPUT
B
IT
= 0
T
RANSMIT
F
RACTIONAL
E1 I
NPUT
B
IT
= 1
TxTSb[0]
Output
TxFrTD
Input
TxTSb[1]
Output
TxSig
Input
TxTSb[2]
Output
TxTS
Output
TxTSb[3]
Output
TxOHSync
Output