參數(shù)資料
型號： TP6508
英文描述： Pushbutton Switch; Actuator Diameter:0.078"; Circuitry:6PDT; Switch Operation:6 Changeover Push-Push; Contact Current Max:100mA; Leaded Process Compatible:Yes; Mounting Type:PCB; Switch Function:6PDT
中文描述： 顯卡
文件頁數(shù)： 94/134頁
文件大?。?/td> 600K
代理商： TP6508
P.91
tion. A logical 1 selects Host CPU memory, and a logical 0 select screen memory. Also, it is used to
control whether the major movement is in the X or Y direction for Line Drawing operation. A logical
0 indicates in the Y direction
(D
Y
>D
X)
, and a logical 1 indicates in the X direction
(D
Y
<D
X).
This bit selects the destination as either the screen memory or the host CPU memory. A logical 1
selects Host CPU memory , and a logical 0 screen memory. Also, this bit is used enable last pixel
write for Line Drawing. A logical 1 enables to write last pixel, and a logical 0 disables it.
This bit would use to select the active Graphics Engine command . A logical 0 indicates Topro VGA
to be selected in BITBLT operation. A logical 1 indicates Topro VGA to be selected in Line Drawing
operation.
A logical 1 enables the color expansion or line drawing transparency feature . A logical 0 disables it,
and enables the Background color.
A logical 1 enables the transparency feature .
A logical 1 enables the rectangular clipping feature.
These bits specify the format of the BITBLT source .
Bit 9
Bit 8
Function
0
0
VGA Color (256/64k/16.8M format)
0
1
Video color (Video engin enable)
1
0
Fixed color (From foreground color Reg.)
1
1
Monochrome from Host for color expansion
This bit is used to control the transparency polarity. A logical 1 is set to positive polarity , a logical
0 is set to negative polarity.
This bit is used to control the rectangular clipping polarity. A logical 0 is enables the write access of
pixels in or on the rectangular defined by GAREG11,12,13,14. A logical 1 is enables the write access
of pixels out of the rectangular defined by GAREG11,12,13,14.
These bits specify the Line Drawing pattern width.
Bit 12
Pattern Width
0
8 bit ; if
D
X
>D
Y, each bit represent 4 pixel.
if
D
X
<
D
Y, each bit represent 3 pixel.
1
32 bit ; each bit represent 1 pixel.
Reserved.
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8-9
Bit 10
Bit 11
Bit 12
Bit 13-15
GAREG Hex 20 : Host to Display Data Transfer Register
This is a read/write register.
Default value after hardware reset is Hex 00,00,00,00.
Default port address 83C4.
PCI port address low 80.
D0-31
Data port for image read/write, color expansion
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PDF描述
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