參數(shù)資料
型號(hào)： TP6508
英文描述： Pushbutton Switch; Actuator Diameter:0.078"; Circuitry:6PDT; Switch Operation:6 Changeover Push-Push; Contact Current Max:100mA; Leaded Process Compatible:Yes; Mounting Type:PCB; Switch Function:6PDT
中文描述： 顯卡
文件頁數(shù)： 91/134頁
文件大?。?/td> 600K
代理商： TP6508
P.88
Bit 0-15
These bits would use to define the background color for background fill, color expansion, and line
drawing. Conjunction with background color bit 16 to 31,that descripts in GAREG 0C, we must write
with the same color data(byte) into bit 0-7, bit 8-15, bit 16-23, and bit 24-31 for 256-color mode. In
different we must write with the same color data(word) into bit 0-15, and bit 16-31 for hi-color mode.
Another condiction we use bit 0-23 as color data and reserved bit 24-31 for ture-color mode.
GAREG Hex 0C : Background Color Register 2
This is a read/write register.
Default value after hardware reset is Hex 00,00.
Default port address 33C4.
PCI port address low 30.
D0-15
Background color bit 16 to 31
Bit 0-15
These bits would use to define the background color for background, color
expansion, and line drawing.
GAREG Hex 0D : Transparency Color Register 1
This is a read/write register.
Default value after hardware reset is Hex 00,00.
Default port address 37C4.
PCI port address low 34.
D0-15
Transparency color bit 0 to 15
Bit 0-15
These bits would use to define the transparency color for all graphics engine commands except image
read. Conjunction with transparency color bit 16 to 31,that descripts in GAREG 0E, we must write
with the same color data(byte) into bit 0-7, bit 8-15, bit 16-23, and bit 24-31 for 256-color mode. In
different we must write with the same color data(word) into bit 0-15, and bit 16-31 for hi-color mode.
Another condiction we use bit 0-23 as color data and reserved bit 24-31 for ture-color
mode.
GAREG Hex 0E : Transparency Color Register 2
This is a read/write register.
Default value after hardware reset is Hex 00,00.
Default port address 3BC4.
PCI port address low 38.
D0-15
Transparency color bit 16 to 31
Bit 0-15
These bits would use to define the transparency color all graphics engine commands except image
read if transparnecy enabled.
GAREG Hex 0F : Transparency Mask Register 1
This is a read/write register.
Default value after hardware reset is Hex 00,00.
Default port address 3FC4.
PCI port address low 3C.
D0-15
Transparency mask bit 0 to 15
Bit 0-15
These bits would use to define the transparency mask bits that are used to compare with the transpar-
ency color all graphics engine commands except image read . Conjunction with transparnecy color
bit 16 to 31,that descripts in GAREG 10, we must write with the same color data(byte) into bit 0-7, bit
8-15, bit 16-23, and bit 24-31 for 256-color mode. In different we must write with the same color
data(word) into bit 0-15, and bit 16-31 for hi-color mode. Another condiction we use bit 0-23 as
color data and reserved bit 24-31 for ture-color mode. The pixels of the destination are compared
against the transparency color under control of the transparency mask. Eachbit of transparency mask
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