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| 型號(hào)： | TP6508 |
| 英文描述： | Pushbutton Switch; Actuator Diameter:0.078"; Circuitry:6PDT; Switch Operation:6 Changeover Push-Push; Contact Current Max:100mA; Leaded Process Compatible:Yes; Mounting Type:PCB; Switch Function:6PDT |
| 中文描述： | 顯卡 |
| 文件頁(yè)數(shù)： | 29/134頁(yè) |
| 文件大?。?/td> | 600K |
| 代理商： | TP6508 |
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VI. Function Descriptions
The TP6508 contains seventeen major functional modules. There are; Host bus interface ,
Sequencer Control , CRT Controller, Attribute Controller , Graphics Controller , Address Multiplexer
, CRT FIFO , Attribute FIFO , Write Buffer , Command FIFO ,Dual frequency Synthesizer , True-Color
Palette , Graphics Engine Controller , PC Video Controller , LCD line buffer , Panel Controller ,
Power Management controller. The main difference between standard VGA and TP6508 is Graphics
Engine Controller. We will introduce detail description on this part of the whole function.
The following is an overview of the major elements of the TP6508.
Host Bus Interface
In addition to an ISA bus connection , it can be connected directly to PCI standard local bus
interface to provide additional graphics performance without any glue logic .
* ISA Bus
TP6508 supports 16-bit ISA Bus with a high integrated bus interface that no additional
logical is require . The TP6508 executes either 8-bit or 16-bit I/O and memory accesses .
* PCI Local Bus
TP6508 can directly connect to 32-bit PCI local bus without any additional logic to
support its multiplexed address and data pins, at speeds of up to 33MHz. The TP6508 sup-
ports 32-bit data width accesses with memory burst mode , fast back-to-back , byte merge
function . It also provides 256k BIOS ROM support and transfers ROM data through VGA to
PCI bus .
Sequencer Controller (SEQC)
The Sequencer Controller includes a timing generator. The timing generator produces the basic
timing sequence control for the CRTC , ATC, GFXC. It manages the display memory and provides an
arbitration for CRT, CPU and Refresh requests. With a deeper CRT FIFO design, the TP6508 performs
fast-page mode to fetch display data quickly into CRT FIFO. When CPU accesses the frame memory, it
inserts a CPU cycle via the arbitrating state machine to CPU access.
CRT Controller (CRTC)
The CRT Controller includes a cursor control logic, a horizontal logic, a vertical control logic ,
and the compatible IBM CRTC registers to generate horizontal synchronous and vertical synchronous
signals for external raster-scan CRT monitor. It also provides split-screen capability and smooth
scrolling. It generates the blank signals that are sent to RAMDAC (True-color palette DAC) to inhibit
pixel display on the screen of monitor.
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