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參數(shù)資料
| 型號： | TP6508 |
| 英文描述： | Pushbutton Switch; Actuator Diameter:0.078"; Circuitry:6PDT; Switch Operation:6 Changeover Push-Push; Contact Current Max:100mA; Leaded Process Compatible:Yes; Mounting Type:PCB; Switch Function:6PDT |
| 中文描述： | 顯卡 |
| 文件頁數(shù)： | 20/134頁 |
| 文件大?。?/td> | 600K |
| 代理商： | TP6508 |
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P16
AD[31:0]
I/O
8maR
C/BE[3:0]#
I
-
PAR
OT
(I/O)
4maR
FRAME#
I
-
TRDY#
OT
12maR
IRDY#
I
-
IDSEL
I
-
RESET#
I/S
-
CLK
I
-
DEVSEL#
OT
(I/O)
12maR
STOP#
OT
(I/O)
4maR
PERR#
O/T
(I/O)
8maR
SERR#
O/T
(I/O)
8maR
1,2,3,4,5,
6,7,8,13,14,
15,16,17,18,19,20,
33,34,35,36,37
38,40,41,44,45
46,47,48,49,50,51
10,21,32,43
31
22
24
23
11
207
201
25
27
29
30
True
True
True
Low
Low
Low
High
Low
True
Low
Low
Low
Low
Address and Data are multiplexed on the same
PCI Bus interface. A Bus transaction consists
of an address phase followed by one or more
data phase.
Bus Command and Byte Enable are multiplexed
on the same PCI Bus interface. During the ad-
dress phase of a transaction, they define the Bus
Command. During the data phase , they are used
as Byte Enable.
Parity is even part across AD[31:0] and
C/BE[3:0]#. Parity generation is required by
all PCI agents.
This input signal is used to indicate the
beginning and duration of an access.
This signal is driven to indicate TP6508's abil-
ity to complete the current data phase. It is used
in conjunction with IRDY#.
This input signal is to indicate Bus master's abil-
ity to complete the current data phase. It is used
in conjunction with TRDY#.
This signal is used as a chip select during con-
figuration read and write access.
This signal is used to reset the TP6508 video
device into initial state.
This is the timing reference for TP6508 when
connected to PCI Local Bus.
This signal is driven to indicate that TP6508
video device has been selected . So TP6508 has
decoded its address as the target of the current
access.
This signal is output to indicate that TP6508 is
requesting the master to stop the current trans-
action.
This signal is used for the reporting of data par-
ity erros. PERR# will be driven high for one
clock before being tristated as with all sustained
tristate signals.
This signal is used for the reporting of system
erros.
* PCI Local Bus Interface
( 48 pins )
Symble Type Drive Pin Number Active Function
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