參數(shù)資料
型號: TP6508
英文描述: Pushbutton Switch; Actuator Diameter:0.078"; Circuitry:6PDT; Switch Operation:6 Changeover Push-Push; Contact Current Max:100mA; Leaded Process Compatible:Yes; Mounting Type:PCB; Switch Function:6PDT
中文描述: 顯卡
文件頁數(shù): 45/134頁
文件大?。?/td> 600K
代理商: TP6508
P.42
VII. Registers Description
TP6508 contain seven groups of registers . These are IBM Standard Register Backward
Compatible Register , Extended Sequencer Register , Extended CRTC Register , Panel Control
Register , PCI Local Bus Configuration Register, Graphics Engine Register.
IBM Standard Register
There are five sets of registers in the video subsystem. All but the system microprocessor data latches and the
attribute address flip-flop are readable. The following figure lists the registers and the I/O address where they are
located. The figure also lists whether or not they are read/write, read-only, or write-only.
* General Registers
Misc. Output Register ( MISCREG: R/3CCH, W/3C2H )
D0
I/O address select ( 0/3BXH, 1/3DXH )
D1
Enable video RAM ( active high, no effect on display refresh )
D2
Clock select 0 ( 00/25MHz, 01/28MHz )
D3
Clock selcet 1 ( 10/auxi., 11/45MHz )
D4
Reserved
D5
Odd/Even page select ( for diagonostic use )
D6
Horizontal sync. polarity select ( 0/positive, 1/negative)
D7
Vertical sync. polarity select ( 0/positive, 1/negative)
Input Status Register 0 ( INSTREG0 : R/3C2H )
D0-3
Reserved
D4
Switch sense bit (match with clock select 0/1 )
D5-6
Reserved (0)
D7
CRT interrupt ( 0/cleared, 1/pending )
Input Status Register 1 ( INSTREG1 : R/3AH )
D0
Display enable ( active low )
D1-2
Reserved
D3
Vertical retrace (VGA) /CG out (Herculus)
D4
Color plane register check 0 ( P0, P4, P1, P6 )
D5
Color plane register check 1 ( P2, P5, P3, P7 )
D6-7
Reserved
Feature Control registe ( FEATREG: R/3CAH, W/3AH )
D0-7
Reserved
VGA DAC I/O Ports
3C6H
3C7H
3C7H
3C8H
3C9H
Pixel mask register
DAC state register ( read only, VGA support D0-D1 )
Look-up table read index ( write only, RAMDAC support )
Look-up table write index
Look-up table data register
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