
P.75
Extended Indexed Register CREG C0 : Flat Panel 350 Scan line Mode Display Center-
ing Control Register
This is a read/write register.
Port address is Hex 3D5.
Default value after hardware reset is Hex 00.
D0-7 LCD panel 350 scan line mode screen shift bit 0 to 7
Bit 0-7
These bits are used to program the vertical screen shift length from the top or
bottom of panel to actual display part on 350 scan line mode. And you can get
through the screen display centering.
Extended Indexed Register CREG C1: Flat Panel 400 Scan line Mode Display Centering
Control Register
This is a read/write register.
Port address is Hex 3D5.
Default value after hardware reset is Hex 00.
D0-7 LCD panel 400 scan line mode screen shift bit 0 to 7
Bit 0-7
These bits are used to program the vertical screen shift length from the top or
bottom of panel to actual display part on 400 scan line mode. And you can get
through the screen display centering.
Extended Indexed Register CREG C2: Flat Panel 480 Scan line Mode Display Centering
Control Register
This is a read/write register.
Port address is Hex 3D5.
Default value after hardware reset is Hex 00.
D0-7 LCD panel 480 scan line mode screen shift bit 0 to 7
Bit 0-7
These bits are used to program the vertical screen shift length from the top or
bottom of panel to actual display part on 480 scan line mode. And you can get
through the screen display centering.
Extended Indexed Register CREGC3 : Half Panel Size Low Register
This is a read/write register.
Port address is Hex 3D5.
Default value after hardware reset is Hex 00.
D0-7 Half panel size bit 0 to 7
Bit 0-7
These bits use to decide the half panel size (scan lines - 1 ) and make TP6508
generating accurate flat panel interface timing.
Extended Indexed Register CREG C4 : Half Panel Size High Register
This is a read/write register.
Port address is Hex 3D5.
Default value after hardware reset is Hex 00.
D0
D1-7 Reserved
Half panel size bit 8
Bit 0
Bit 1-7
This bit is the high bit of half panel size register.
Reserved.