參數(shù)資料
型號： SPD6729QCE
廠商： INTEL CORP
元件分類： 總線控制器
英文描述： PCMCIA BUS CONTROLLER, PQFP208
封裝： MQFP-208
文件頁數(shù)： 98/116頁
文件大?。?/td> 1442K
代理商： SPD6729QCE
PD6729 — PCI-to-PC Card (PCMCIA) Controller
82
Datasheet
10.8.4
Device Capability Byte B
Bit 31: Extended Definitions
A value of ‘0’ indicates that there is no extended definition. Description of device capabilities and
implementations stops at extended register 3Bh.
Bits 30:27: RFU (Reserved for Future Use)
Reserved for future use.
Bit 26: CLKRUN Support
A ‘0’ indicates that the PD6729 does not output a CLKRUN signal for the PCI Mobile Spec
signaling for control of system clock turn on/turn off.
Bit 25: LOCK# Support
A ‘0’ indicates that the PD6729 does not support operations involving the LOCK# signal.
Bit 24: Cardbus Capable
A ‘0’ in this bit indicates that the PD6729 does not support Cardbus transfer cycles on PC Cards.
10.8.5
Device Implementation Byte A
All bits of this byte are read/write.
Device reset defaults are specific to each device. It is intended that a BIOS write to this byte before
launching socket services would set these bits to reflect which features are supported in the system
implementation.
Register Name: Device Capability Byte B
Index: 2Fh
Extended Index: 37h
Register Per: chip
Register Compatibility Type: ext.
Bit 31
Bit 30
Bit 29
Bit 28
Bit 27
Bit 26
Bit 25
Bit 24
Extended
Def’s
RFU (ZV)
RFU (CB)
CLKRUN
Support
LOCK#
Support
CardBus
Capable
R:0
Register Name: Device Implementation
Byte A
Index: 2Fh
Extended Index: 38h
Register Per: chip
Register Compatibility Type: ext.
Bit 39
Bit 38
Bit 37
Bit 36
Bit 35
Bit 34
Bit 33
Bit 32
RI_OUT
Wired
H/W
Sus.Wired
GPSTB B
Wired
GPSTB A
Wired
VS1/VS2
Wired
Slv. DMA
Wired
Sockets
Present 1
Sockets
Present 0
R/W:0
R/W:1
R/W:0
R/W:1
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