參數(shù)資料
型號: SPD6729QCE
廠商: INTEL CORP
元件分類: 總線控制器
英文描述: PCMCIA BUS CONTROLLER, PQFP208
封裝: MQFP-208
文件頁數(shù): 45/116頁
文件大?。?/td> 1442K
代理商: SPD6729QCE
PD6729 — PCI-to-PC Card (PCMCIA) Controller
34
Datasheet
4.0
Register Description Conventions
Register Headings
The description of each register starts with a header containing the following information:
Special Function Bits
Following is a description of bits with special functions:
Bit Naming Conventions
The following keywords are used within bit and field names:
Header Field
Description
Register Name
This indicates the register name.
Offset
This is added to the base address to generate
the total effective address. This field is for
PCI-Configuration registers only.
Register Per
This indicates whether the register affects
both sockets, marked chip, or an individual
socket, marked socket. If socket is indicated,
there are two registers being described, each
with a separate Index value (one for each
socket, A and B). 1
Index 1
This is the Index value through which an
internal register in an indexed register set is
accessed.
Register
Compatibility
Type
This indicates whether the register is
82365SL-compatible, marked 365 or a
register extension, marked ext.
NOTE:
1. When the register is socket-specific, the Index value given in
the register heading is for Socket A only. For the Socket B
register, add 40h to the Index value of the Socket A register.
Bit Type
Description
Reserved
These bits are Reserved and should not be
changed.
Compatibility Bit
These bits have no function on the PD6729
but are included for compatibility with the
82365SL register set.
0 or 1
These read-only bits are forced to either a ‘0’
or ‘1’ at reset and cannot be changed.
Scratchpad Bit
These read/write bits are available for use as
bits of memory.
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