參數(shù)資料
型號: SPD6729QCE
廠商: INTEL CORP
元件分類: 總線控制器
英文描述: PCMCIA BUS CONTROLLER, PQFP208
封裝: MQFP-208
文件頁數(shù): 113/116頁
文件大?。?/td> 1442K
代理商: SPD6729QCE
PD6729 — PCI-to-PC Card (PCMCIA) Controller
96
Datasheet
13.3
AC Timing Specifications
This section includes system timing requirements for the PD6729. Unless otherwise specified,
timings are provided in nanoseconds (ns), at TTL input levels, with the ambient temperature
varying from 0
°C to 70°C, and V
CC varying from 3.0V to 3.6V or 4.5V to 5.5V DC. The PCI bus
speed is 33 MHz unless otherwise specified. Note the following conventions:
A pound sign (#) at the end of a pin name indicates an active-low signal for the PCI bus.
A dash (-) at the beginning of a pin name indicates an active-low signal for the PCMCIA bus.
An asterisk (*) at the end of a pin name indicates an active-low signal that is a general-
interface for the PD6729.
Additionally, the following statements are true for all timing information:
All timings assume a load of 50 pF.
TTL signals are measured at TTL threshold; CMOS signals are measured at CMOS threshold.
13.3.1
PCI Bus Timing
Table 18. Index of AC Timing Specifications
Title
Page Number
Table 19. FRAME#, AD[31:0], C/BE[3:0]#, and DEVSEL# (Sheet 1 of 2)
Symbol
Parameter
PCI_VCC = 3.3 V
PCI_VCC = 5.0 V
Units
MIN
MAX
MIN
MAX
t1
FRAME# setup to PCI_CLK
7
7
ns
t2
AD[31:0] (address) setup to PCI_CLK
7
7
ns
t3
AD[31:0] (address) hold from PCI_CLK
0
0
ns
t4
AD[31:0] (data) setup to PCI_CLK
7
7
ns
t5
AD[31:0] (data) active to HI-Z from PCI_CLK
0
28
0
28
ns
t6
C/BE[3:0]# (bus command) setup to PCI_CLK
7
7
ns
t7
C/BE[3:0]# (bus command) hold from PCI_CLK
0
0
ns
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