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參數(shù)資料
| 型號： | SPEAR-09-B042 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), 100M bps, I2C BUS CONTROLLER, PBGA289 |
| 封裝： | 15 X 15 MM, 1.70 MM HEIGHT, ROHS COMPLIANT, LFBGA-289 |
| 文件頁數(shù)： | 1/66頁 |
| 文件大?。?/td> | 917K |
| 代理商： | SPEAR-09-B042 |
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Preliminary Data
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
May 2008
Rev 1
1/66
1
SPEAR-09-B042
SPEAr BASIC
ARM 926EJ-S core, customizable logic, large IP portfolio SoC
Features
■ ARM926EJ-S core @333 MHz
– 16 Kbyte instructions/data cache
■ Reconfigurable logic array:
– 300 Kgate (100% utilization rate)
– 102 I/O lines
– No clock domain limitation
– 64 Kbyte + 8 Kbyte configurable memory
pool
■ Multilayer AMBA 2.0 compliant bus with fMAX
166 MHz
■ 32-Kbyte boot ROM
■ 8 Kbyte common static RAM
– Shared with reconfigurable array
■ Dynamic power saving features
■ High performance DMA
– 8 channels
■ Ethernet 10/100 MAC with MII interface.
(IEEE-802.3)
■ USB 2.0 device with integrated PHY
■ 2 USB 2.0 host with integrated PHY
■ External DRAM memory interface:
– 8/16-bit (LPDDR@166 MHz)
– 8/16-bit (DDR2@333 MHz)
– 2 banks available
■ Flash interface:
– SPI serial (up to 50 Mbps)
■ SPI master/slave up to 50 Mbps
– Compliant with Motorola, Texas
instruments and National semiconductor
protocols
■ I2C master/slave mode – high, fast and slow
speed
■ UARTs (up to 460.8 Kbps)
■ IrDA (FIR/MIR/SIR) compliant serial link from
9.6 Kbps to 4 Mbps speed-rate
■ 6 legacy GPIO bidirectional signals with
interrupt capability
■ ADC 10-bit, 1 Msps 8 inputs
– Hw supporting up to 13.5 bits at 8 KSPS by
oversampling and accumulation
■ JPEG codec accelerator (1 clock/pixel)
■ C3 crypto accelerator
■ 3 pairs of 16-bit general purpose timers with
programmable prescaler
■ Real-time clock
■ Watchdog
■ System controller
■ Miscellaneous internal control registers
– SOC parameter configuration
■ JTAG (IEEE1149.1) interface
■ ETM9 interface
■ Operating temperature: - 40 to 85 °C
■ Low power consumption technology
Description
SPEAr BASIC is a powerful digital engine
belonging to SPEAr family, the innovative
customizable system-on-chip. The device
integrates an ARM 926 core with an extensive set
of proven IPs and a large configurable logic block
that allows very fast customization of unique
and/or proprietary solutions.
LFBGA289
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SPEAR-09-H022 | 制造商:STMicroelectronics 功能描述: |
| SPEAR-09-H022_06 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:SPEAr Head200 ARM 926, 200K customizable eASIC gates, large IP portfolio SoC |
| SPEAR-09-H042 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:SPEAr⑩ Head200, ARM 926, 200 K customizable eASIC⑩ gates, large IP portfolio SoC |
| SPEAR-09-H122 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:SPEAr⑩ Head600 |
| SPEAR-09-H122_08 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:SPEAr⑩ Head600 |
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