參數(shù)資料
型號： SPD6729QCE
廠商： INTEL CORP
元件分類： 總線控制器
英文描述： PCMCIA BUS CONTROLLER, PQFP208
封裝： MQFP-208
文件頁數(shù)： 34/116頁
文件大?。?/td> 1442K
代理商： SPD6729QCE
PD6729 — PCI-to-PC Card (PCMCIA) Controller
24
Datasheet
Having five memory windows per socket allows a memory-type card to be accessed through four
memory windows programmed for common memory access, (allowing PC-type expanded-
memory-style management), leaving the fifth memory window available to be programmed to
access the card’s attribute memory without disrupting the common memory in use.
Each memory window has several programming options, including:
Each I/O window also has several programming options, including:
Memory Window Option
Description
Enable
Each of the five memory windows can be individually enabled. Disabled windows are not
responded to.
Start Address
This is the start address of the memory window within the selected 16-Mbyte page of PCI
memory. The start address can be programmed to reside on any 4-Kbyte boundary within the
programmed page of PCI memory.
End Address
This is the end address of the memory window within the selected 16-Mbyte page of PCI
memory. The end address can be programmed to reside on any 4-Kbyte boundary within the
programmed page of PCI memory. Only memory accesses between the start and end address
are responded to.
Offset Address
The offset address is added to the PCI address to determine the address for accessing the
PCMCIA card. This allows the addresses in the PCMCIA address space to be different from the
PCI address space.
Upper Address
The upper memory address specifies a 16-Mbyte page of PCI memory.
Timing
The timing of accesses (Setup/Command/Recovery) can be set by either of two timing register
sets: Timer Set 0 or Timer Set 1.
Register Access Setting
The -REG pin can be enabled on a per-window basis so that any of the windows can be used for
accessing attribute memory.
Write Protect
If the window is programmed to be write-protected, then writes to the memory window are
ignored (reads are still performed normally).
I/O Window Option
Description
Enable
Each of the two I/O windows can be individually enabled.
Start Address
The start address of the window is programmable on single-byte boundaries from 0 to 64
Kbytes.
End Address
The end address of the window is also programmable on single-byte boundaries from 0 to 64
Kbytes.
Offset Address
The offset address is added to the PCI address to determine the address for accessing the
PCMCIA card.
Auto Size
The size of accesses can be set automatically, based on the PCMCIA -IOIS16 signal.
Data Size
The size of accesses can be set manually to either 8 or 16 bits, overriding the Auto Size option.
Timing
The timing of accesses (Setup/Command/Recovery) can be set by either of two timing register
sets: Timer Set 0 or Timer Set 1.
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