參數(shù)資料
型號(hào): SPD6729QCE
廠商: INTEL CORP
元件分類: 總線控制器
英文描述: PCMCIA BUS CONTROLLER, PQFP208
封裝: MQFP-208
文件頁(yè)數(shù): 85/116頁(yè)
文件大?。?/td> 1442K
代理商: SPD6729QCE
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PD6729 — PCI-to-PC Card (PCMCIA) Controller
70
Datasheet
10.0
Extension Registers
10.1
Misc Control 1
Bit 0: Multimedia Enable
This bit tristates socket address lines A[25:4]. All other aspects of the socket are not affected by
this bit.
Note:
Bit 7 in the Extended register 25h, the Misc Control 3 register must be set to a ‘1’ for this bit to
enable tristating of address lines [25-4].
Bit 1: VCC 3.3V
This bit determines which output pin is used to enable VCC power to the socket when card power is
applied; this bit is used in conjunction with bits 5-4 of the Power Control register (see “Power
Bit 2: Pulse Management Interrupt
This bit selects Level or Pulse mode operation of the IRQ[XX] pin (see Table 1 on page 15). Note
that a clock must be present on PCI_CLK or IRQ14/EXT_CLK for pulsed interrupts to work. Refer
to “System Interrupt Timing” on page 100 for more information on interrupt timing.
Register Name: Misc Control 1
Index: 16h
Register Per: socket
Register Compatibility Type: ext.
Bit 7Bit 6Bit 5Bit 4Bit 3
Bit 2Bit 1
Bit 0
Inpack
Enable
Scratchpad Bits
Speaker
Enable
Pulse System
IRQ
Pulse
Management
Interrupt
VCC 3.3V
Multimedia
Enable
RW:0
RW:00
RW:0
0
Socket address lines are normal.
1
Socket address lines A[25:4] are high-impedance.
0
-VCC_5 activated when card power is to be applied.
1
-VCC_3 activated when card power is to be applied.
0
Interrupts are passed to the IRQ[XX] pin as level-sensitive.
1
When an interrupt occurs, the IRQ[XX] pin is driven with the pulse train shown in Table 12 and
allows for interrupt sharing.
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