參數(shù)資料
型號: SPD6729QCE
廠商: INTEL CORP
元件分類: 總線控制器
英文描述: PCMCIA BUS CONTROLLER, PQFP208
封裝: MQFP-208
文件頁數(shù): 105/116頁
文件大?。?/td> 1442K
代理商: SPD6729QCE
PCI-to-PC Card (PCMCIA) Controller — PD6729
Datasheet
89
11.2.0.1
Bits 5-0: Command Multiplier Value
This field indicates an integer value Nval from 0 to 63; it is combined with a prescalar value (bits
7-6) to control the length that a command is active.
Bits 7-6: Command Prescalar Select
This field chooses one of four prescalar values Npres that are combined with the value of the
Command Multiplier Value (bits 5-0) to control the length that a command is active.
11.3
Recovery Timing 0-1
There are two separate Recover Timing registers, each with identical fields. These registers are
located at the following indexes:
Index
(Socket A)Recovery Timing
3Ch
Recovery Timing 0
3Fh
Recovery Timing 1
The Recovery Timing register for each timer set controls how long a PCMCIA cycle’s command
(that is, -OE, -WE, -IORD, -IOWR; see Table 2) recovery time will be, in terms of the number of
internal clock cycles.
The overall command recovery timing length R is programmed by selecting a 2-bit prescaling
value (bits 7-6 of this register) representing weights of 1, 16, 256, or 4096, and then selecting a
multiplier value (bits 5-0) to which that prescalar is multiplied to produce the overall command
recovery timing length according to the following formula:
R = (Npres × Nval) + 1
The value of R, representing the number of clock cycles for command recovery, is then multiplied
by the clock period of the internal clock driving the PC card interface to determine the actual
command recovery time (see “PCMCIA Bus Timing Calculations” on page 101 for further
discussion).
00
Npres = 1
01
Npres = 16
10
Npres = 256
11
Npres = 4096
Register Name: Recovery Timing 0-1
Index: 3Ch, 3Fh
Register Per: socket
Register Compatibility Type: 365
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Recovery Prescalar Select
Recovery Multiplier Value
RW:00
RW:000000
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