參數(shù)資料
型號(hào): SPD6729QCE
廠商: INTEL CORP
元件分類: 總線控制器
英文描述: PCMCIA BUS CONTROLLER, PQFP208
封裝: MQFP-208
文件頁(yè)數(shù): 55/116頁(yè)
文件大?。?/td> 1442K
代理商: SPD6729QCE
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)當(dāng)前第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)
PCI-to-PC Card (PCMCIA) Controller — PD6729
Datasheet
43
6.0
Operation Registers
The PD6729’s internal Device Control, Window Mapping, Extension, and Timing registers are
accessed through a pair of Operation registers — an Index register and a Data register.
The Index register is accessed at the address programmed in the Base Address 0 register, and the
Data register (see “Data” on page 47) is accessed by adding 1 to the address programmed in Base
Address 0.
6.1
Index
Bits 5-0: Register Index
These bits determine which of the 64 possible socket-specific registers will be accessed when the
Data register is next accessed by the processor. Note that some values of the Register Index field
are reserved, see Table 7.
Bit 6: Socket Index
This bit determines which set of socket-specific registers is currently selected. When this bit is a
‘0’, a Socket A register is selected; when this bit is a ‘1’, a Socket B register is selected.
The Index register value determines which internal register should be accessed (read or written) in
response to each CPU access of the Data register. Each of the two possible PCMCIA sockets is
allocated 64 of the 256 locations in the internal register index space.
Figure 10. Operation Registers as PCI Double-Word I/O Space at
Base Address 0 Register (programmed at offset 10h)
Register Name: Index
Index: n/a
Register Per: chip
Register Compatibility Type: 365
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
Reserved
Socket Index
Register Index
RW:0
RW:000000
Index Register
Data to/from
Ignored
Indexed Register
1 + Base Address 0
Base Address 0
3 + Base Address 0
2 + Base Address 0
相關(guān)PDF資料
PDF描述
SPEAR-09-B042 1 CHANNEL(S), 100M bps, I2C BUS CONTROLLER, PBGA289
SPEAR300-2 32-BIT, FLASH, 333 MHz, RISC MICROCONTROLLER, PBGA289
SPL505YC264ATT PROC SPECIFIC CLOCK GENERATOR, PDSO64
SPL505YC264BT 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO64
SPL505YC264BT 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO64
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SPD6730QCB 制造商:Rochester Electronics LLC 功能描述:- Bulk
SPD6832QCB 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Intel 功能描述:
SPD73 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Shielded Surface Mount Inductors
SPD73-103M 功能描述:固定電感器 10uH 20% .067ohm Shield Choke SMT Pwr RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm
SPD73-103MTR 功能描述:固定電感器 10 UH 20% RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm