參數(shù)資料
型號: SPD6729QCE
廠商: INTEL CORP
元件分類: 總線控制器
英文描述: PCMCIA BUS CONTROLLER, PQFP208
封裝: MQFP-208
文件頁數(shù): 55/116頁
文件大?。?/td> 1442K
代理商: SPD6729QCE
PCI-to-PC Card (PCMCIA) Controller — PD6729
Datasheet
43
6.0
Operation Registers
The PD6729’s internal Device Control, Window Mapping, Extension, and Timing registers are
accessed through a pair of Operation registers — an Index register and a Data register.
The Index register is accessed at the address programmed in the Base Address 0 register, and the
Data register (see “Data” on page 47) is accessed by adding 1 to the address programmed in Base
Address 0.
6.1
Index
Bits 5-0: Register Index
These bits determine which of the 64 possible socket-specific registers will be accessed when the
Data register is next accessed by the processor. Note that some values of the Register Index field
are reserved, see Table 7.
Bit 6: Socket Index
This bit determines which set of socket-specific registers is currently selected. When this bit is a
‘0’, a Socket A register is selected; when this bit is a ‘1’, a Socket B register is selected.
The Index register value determines which internal register should be accessed (read or written) in
response to each CPU access of the Data register. Each of the two possible PCMCIA sockets is
allocated 64 of the 256 locations in the internal register index space.
Figure 10. Operation Registers as PCI Double-Word I/O Space at
Base Address 0 Register (programmed at offset 10h)
Register Name: Index
Index: n/a
Register Per: chip
Register Compatibility Type: 365
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
Reserved
Socket Index
Register Index
RW:0
RW:000000
Index Register
Data to/from
Ignored
Indexed Register
1 + Base Address 0
Base Address 0
3 + Base Address 0
2 + Base Address 0
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