參數(shù)資料
型號(hào): SPD6729QCE
廠商: INTEL CORP
元件分類: 總線控制器
英文描述: PCMCIA BUS CONTROLLER, PQFP208
封裝: MQFP-208
文件頁(yè)數(shù): 101/116頁(yè)
文件大小: 1442K
代理商: SPD6729QCE
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PCI-to-PC Card (PCMCIA) Controller — PD6729
Datasheet
85
Bit 50 — SPKR Wired
A value of ‘1’ indicates that in the particular system implementation a speaker is connected to the
SPKR_OUT pin. A value of ‘0’ indicates that a speaker is not connected to the SPKR_OUT pin.
Bit 49 — Per Skt LED
A value of ‘1’ indicates that in the particular system implementation there are separate status LEDs
for each socket being controlled by the device. This bit should remain cleared to ‘0’ as the PD6729
supports a single status LED.
Bit 48 — LED Wired
A value of ‘1’ indicates that in the particular system implementation a status LED has been
connected to the LED_OUT# pin. A value of ‘0’ indicates that a status LED is not connected in this
system implementation.
10.8.8
Device Implementation Byte D
10.8.8.1
Bit 63 — RFU (Reserved for future use)
Reserved for future use.
Bit 62 — Clk Opt. Wired
A value of ‘1’ indicates that in the particular system implementation an external clock has been
wired to the PD6729 EXT_CLK pin. A value of ‘0’ indicates that an external clock being
connected.
Bits 61:58 — RFU (Reserved for future use)
Reserved for future use.
Bit 57 — LOCK# Wired
A value of ‘1’ indicates that the system the system implementation provides a LOCK# signal to a
device. Since the PD6729 does not implement LOCK#, this bit should remain cleared to ‘0’.
Register Name: Device Implementation
Byte D
Index: 2Fh
Extended Index: 3Bh
Register Per: chip
Register Compatibility Type: ext.
Bit 63
Bit 62
Bit 61
Bit 60
Bit 59
Bit 58
Bit 57
Bit 56
RFU
Clk Opt.
Wired
RFU
LOCK#
Wired
CLKRUN
Wired
R/W:0
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