參數(shù)資料
型號(hào)： SPD6729QCE
廠商： INTEL CORP
元件分類(lèi)： 總線控制器
英文描述： PCMCIA BUS CONTROLLER, PQFP208
封裝： MQFP-208
文件頁(yè)數(shù)： 28/116頁(yè)
文件大?。?/td> 1442K
代理商： SPD6729QCE
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PCI-to-PC Card (PCMCIA) Controller — PD6729
Datasheet
19
RDY/-IREQ
Ready / Interrupt Request: In Memory
Card Interface mode, this input indicates to
the PD6729 that the card is either ready or
busy. In I/O Card Interface mode, this input
indicates a card interrupt request.
95
170
1
I-PU
2 or 3
–
-WAIT
Wait: This input indicates a request by the
card to the PD6729 to halt the cycle in
progress until this signal is deactivated.
111
186
1
I-PU
2 or 3
–
-CD[2:1]
Card Detect: These inputs indicate to the
PD6729 the presence of a card in the
socket. They are internally pulled high to
the voltage of the +5V power pin.
126, 66
202, 142
2
I-PU
1
–
-CE[2:1]
Card Enable: These outputs are driven
low by the PD6729 during card access
cycles to control byte/word card access.
-CE1 enables even-numbered address
bytes, and -CE2 enables odd-numbered
address bytes. When configured for 8-bit
cards, only -CE1 is active and A0 is used
to indicate access of odd- or even-
numbered bytes.
79, 75
154, 151
2
TO
2 or 3
2 mA
RESET
Card Reset: This output is low for normal
operation and goes high to reset the card.
To prevent reset glitches to a card, this
signal is high-impedance unless a card is
seated in the socket, card power is applied,
and the card’s interface signals are
enabled.
109
184
1
TO
2 or 3
2 mA
BVD2/-SPKR/
-LED
Battery Voltage Detect 2 / Speaker /
LED: In Memory Card Interface mode, this
input serves as the BVD2 (battery warning
status) input. In I/O Card Interface mode,
this input can be configured as a card’s -
SPKR binary audio input. For ATA or non-
ATA (SFF-68) disk-drive support, this input
can also be configured as a drive-status
LED input.
116
192
1
I-PU
2 or 3
–
BVD1/
-STSCHG/-RI
Battery Voltage Detect 1 / Status
Change / Ring Indicate: In Memory Card
Interface mode, this input serves as the
BVD1 (battery-dead status) input. In I/O
Card Interface mode, this input is the -
STSCHG input, which indicates to the
PD6729 that the card’s internal status has
changed. If bit 7 of the Interrupt and
General Control register is set to a ‘1’, this
pin serves as the ring indicate input for
wakeup-on-ring system power
management support.
118
194
1
I-PU
2 or 3
–
Table 2.
Socket Interface Pins (Sheet 2 of 3)
Pin Name1
Description2
Pin Number
Qty.
I/O
Pwr.
Drive
Socket A
Socket B
NOTES:
1. To differentiate the sockets, all socket-specific pins have either A_ or B_ prepended to the pin names indicated. For example,
A_A[25:0] and B_A[25:0] are the independent address buses to the sockets.
2. When a socket is configured as an ATA drive interface, socket interface pin functions change. See “ATA Mode Operation” on
page 91.
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