參數(shù)資料
型號: SPD6729QCE
廠商: INTEL CORP
元件分類: 總線控制器
英文描述: PCMCIA BUS CONTROLLER, PQFP208
封裝: MQFP-208
文件頁數(shù): 7/116頁
文件大?。?/td> 1442K
代理商: SPD6729QCE
PD6729 — PCI-to-PC Card (PCMCIA) Controller
104
Datasheet
Figure 18. Word I/O Read/Write Timing
Table 27. PCMCIA Read/Write Timing when System is 8-Bit
Symbol
Parameter
MIN
MAX
Units
t1
-REG or Address setup to Command active1
(S
× Tcp) – 10
ns
t2
Command pulse width2
(C
× Tcp) – 10
ns
t3
Address hold from Command inactive3
(R
× Tcp) – 10
ns
t4
Data setup before Command inactive
(2 Tcp) + 10
ns
t5
Data hold after command inactive
0
ns
NOTES:
1. The Setup time is determined by the value programmed into the Setup Timing register, index 3Ah/3Dh. Using the Timer Set
0 default value of 01h, the setup time would be 100 ns. S = (Npres × Nval + 1), see “PCMCIA Bus Timing Calculations” on
2. The Command time is determined by the value programmed into the Command Timing register, index 3Bh/3Eh. Using the
Timer Set 0 default value of 05h, the Command time would be 340 ns. C = (Npres × Nval + 1), see page 101.
3. The Recovery time is determined by the value programmed into the Recovery Timing register, index 3Ch/3Fh. Using the
Timer Set 0 default value of 00h, the hold (Recovery) time would be 30 ns. R = (Npres × Nval + 1), see page 101.
t4
-WAIT
t9
t10
t8
-IOWR, -IORD
t1
t2
t6
t3
-IOIS16
t7
-CE1
-REG,
A[25:0]
-CE2
D[15:0]
tref
Write Cycle
Read Cycle
t5
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