參數(shù)資料
型號: SPD6729QCE
廠商: INTEL CORP
元件分類: 總線控制器
英文描述: PCMCIA BUS CONTROLLER, PQFP208
封裝: MQFP-208
文件頁數(shù): 71/116頁
文件大?。?/td> 1442K
代理商: SPD6729QCE
PD6729 — PCI-to-PC Card (PCMCIA) Controller
58
Datasheet
Bit 1: Memory Map 1 Enable
When this bit is a ‘1’, the Memory Window Mapping registers for Memory Window 1 are enabled
and the controller will respond to memory accesses in the memory space defined by those registers.
Bit 2: Memory Map 2 Enable
When this bit is a ‘1’, the Memory Window Mapping registers for Memory Window 2 are enabled
and the controller will respond to memory accesses in the memory space defined by those registers.
Bit 3: Memory Map 3 Enable
When this bit is a ‘1’, the Memory Window Mapping registers for Memory Window 3 are enabled
and the controller will respond to memory accesses in the memory space defined by those registers.
Bit 4: Memory Map 4 Enable
When this bit is a ‘1’, the Memory Window Mapping registers for Memory Window 4 are enabled
and the controller will respond to memory accesses in the memory space defined by those registers.
Bit 6: I/O Map 0 Enable
When this bit is a ‘1’, the I/O Window Mapping registers for I/O Window 0 are enabled and the
controller will respond to I/O accesses in the I/O space defined by those registers.
0
Memory Window Mapping registers for Memory Window 1 disabled.
1
Memory Window Mapping registers for Memory Window 1 enabled.
0
Memory Window Mapping registers for Memory Window 2 disabled.
1
Memory Window Mapping registers for Memory Window 2 enabled.
0
Memory Window Mapping registers for Memory Window 3 disabled.
1
Memory Window Mapping registers for Memory Window 3 enabled.
0
Memory Window Mapping registers for Memory Window 4 disabled.
1
Memory Window Mapping registers for Memory Window 4 enabled.
0
I/O Window Mapping registers for I/O Window 0 disabled.
1
I/O Window Mapping registers for I/O Window 0 enabled.
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