參數(shù)資料
型號: SPD6729QCE
廠商: INTEL CORP
元件分類: 總線控制器
英文描述: PCMCIA BUS CONTROLLER, PQFP208
封裝: MQFP-208
文件頁數(shù): 104/116頁
文件大?。?/td> 1442K
代理商: SPD6729QCE
PD6729 — PCI-to-PC Card (PCMCIA) Controller
88
Datasheet
Bits 7-6: Setup Prescalar Select
This field chooses one of four prescalar values Npres that are combined with the value of the Setup
Multiplier Value (bits 5-0) to control the length of setup time before a command becomes active.
11.2
Command Timing 0-1
There are two separate Command Timing registers, each with identical fields. These registers are
located at the following indexes:
Index
(Socket A)Command Timing
3Bh
Command Timing 0
3Eh
Command Timing 1
The Command Timing register for each timer set controls how long a PCMCIA cycle’s command
(that is, -OE, -WE, -IORD, -IOWR; see Table 2 on page 18) active time will be, in terms of the
number of internal clock cycles.
The overall command timing length C is programmed by selecting a 2-bit prescaling value (bits 7-6
of this register) representing weights of 1, 16, 256, or 4096, and then selecting a multiplier value
(bits 5-0) to which that prescalar is multiplied to produce the overall command timing length
according to the following formula:
C = (Npres × Nval) + 1
The value of C, representing the number of clock cycles for a command, is then multiplied by the
clock period of the internal clock driving the PC card interface to determine the actual command
active time (see “PCMCIA Bus Timing Calculations” on page 101 for further discussion).
00
Npres = 1
01
Npres = 16
10
Npres = 256
11
Npres = 4096
Register Name: Command Timing 0-1
Index: 3Bh, 3Eh
Register Per: socket
Register Compatibility Type: 365
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Command Prescalar Select
Command Multiplier Value
RW:00
RW:000101/0101001
NOTE:
1. Timing set 0 (index 3Bh) resets to 5h, providing a 300-ns nominal PC card command width useable for support of ‘250-ns’ PC
cards. Timing set 1 (3Eh) resets to 14h, providing a 900 ns nominal PC card command width.
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