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| 型號(hào)： | S1C88104P0A0100 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, PBGA240 |
| 封裝： | VFBGA10H-216 |
| 文件頁(yè)數(shù)： | 195/211頁(yè) |
| 文件大?。?/td> | 1802K |
| 代理商： | S1C88104P0A0100 |
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76
EPSON
S1C8F626 TECHNICAL MANUAL
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Serial Interface)
5.7.11 Programming notes
(1) Be sure to initialize the serial interface mode in
the transmitting/receiving disable status
(TXENx = RXENx = "0").
(2) Do not perform double trigger (writing "1") to
TXTRGx (RXTRGx) when the serial interface is
in the transmitting (receiving) operation.
Furthermore, do not execute the SLP instruc-
tion. (When executing the SLP instruction, set
TXENx = RXENx = "0".)
(3) In the clock synchronous mode, since one clock
_________
line (SCLKx) is shared for both transmitting and
receiving, transmitting and receiving cannot be
performed simultaneously. (Half duplex only is
possible in clock synchronous mode.)
Consequently, be sure not to write "1" to
RXTRGx (TXTRGx) when TXTRGx (RXTRGx) is
"1".
(4) When a parity error or framing error is gener-
ated during receiving in the asynchronous
mode, the receiving error interrupt factor flag
FSERRx is set to "1" prior to the receiving
complete interrupt factor flag FSRECx for the
time indicated in Table 5.7.11.1. Consequently,
when an error is generated, you should reset the
receiving complete interrupt factor flag FSRECx
to "0" by providing a wait time in error process-
ing routines and similar routines.
When an overrun error is generated, the
receiving complete interrupt factor flag FSRECx
is not set to "1" and a receiving complete
interrupt is not generated.
Table 5.7.11.1 Time difference between FSERRx
and FSRECx on error generation
Clock source
Time difference
fOSC3 / n
Programmable timer
1/2 cycles of fOSC3 / n
1 cycle of timer 1/7 underflow
(5) When the demultiplied signal of the OSC3
oscillation circuit is made the clock source, it is
necessary to turn the OSC3 oscillation ON, prior
to using the serial interface.
A time interval of several tens of sec to several
tens of msec, from the turning ON of the OSC3
oscillation circuit to until the oscillation stabi-
lizes, is necessary, due to the oscillation element
that is used. Consequently, you should allow an
adequate waiting time after turning ON of the
OSC3 oscillation, before starting transmitting/
receiving of serial interface. (The oscillation start
time will vary somewhat depending on the
oscillator and on the externally attached parts.
Refer to the oscillation start time example
indicated in Chapter 9, "ELECTRICAL CHAR-
ACTERISTICS".)
At initial reset, the OSC3 oscillation circuit is set
to OFF status.
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