
S1C8F626 TECHNICAL MANUAL
EPSON
19
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (I/O Memory Map)
Table 5.1.1(g) I/O Memory map (00FF35H–00FF3AH)
SR R/W
Address Bit
Name
Function
Comment
10
D7
D6
D5
D4
D3
D2
D1
D0
PTM07
PTM06
PTM05
PTM04
PTM03
PTM02
PTM01
PTM00
PTM0 data D7 (MSB)
PTM0 data D6
PTM0 data D5
PTM0 data D4
PTM0 data D3
PTM0 data D2
PTM0 data D1
PTM0 data D0 (LSB)
1R
High
Low
00FF36
D7
D6
D5
D4
D3
D2
D1
D0
PTM17
PTM16
PTM15
PTM14
PTM13
PTM12
PTM11
PTM10
PTM1 data D7 (MSB)
PTM1 data D6
PTM1 data D5
PTM1 data D4
PTM1 data D3
PTM1 data D2
PTM1 data D1
PTM1 data D0 (LSB)
1R
High
Low
00FF37
D7
D6
D5
D4
D3
D2
D1
D0
CDR17
CDR16
CDR15
CDR14
CDR13
CDR12
CDR11
CDR10
PTM1 compare data D7 (MSB)
PTM1 compare data D6
PTM1 compare data D5
PTM1 compare data D4
PTM1 compare data D3
PTM1 compare data D2
PTM1 compare data D1
PTM1 compare data D0 (LSB)
0
R/W
High
Low
00FF35
D7
D6
D5
D4
D3
D2
D1
D0
00FF38
MODE16_B
PTNREN_B
–
RPTOUT2
PTOUT2
PTRUN2
PSET2
CKSEL2
"0" when being read
0
–
0
R/W
W
R/W
PTM2–3 8/16-bit mode selection
External clock 1 noise rejector selection
–
PTM2 inverted clock output control
PTM2 clock output control
PTM2 Run/Stop control
PTM2 preset
PTM2 input clock selection
16
-bit x 1
Enable
–
On
Run
Preset
External clock
8
-bit x 2
Disable
–
Off
Stop
No operation
Internal clock
00FF39 D7
D6
D5
D4
D3
D2
D1
D0
–
RPTOUT3
PTOUT3
PTRUN3
PSET3
CKSEL3
–
PTM3 inverted clock output control
PTM3 clock output control
PTM3 Run/Stop control
PTM3 preset
PTM3 input clock selection
Constantly "0" when
being read
"0" when being read
–
0
R/W
W
R/W
–
Off
Stop
No operation
Internal clock
–
On
Run
Preset
External clock
D7
D6
D5
D4
D3
D2
D1
D0
RDR27
RDR26
RDR25
RDR24
RDR23
RDR22
RDR21
RDR20
PTM2 reload data D7 (MSB)
PTM2 reload data D6
PTM2 reload data D5
PTM2 reload data D4
PTM2 reload data D3
PTM2 reload data D2
PTM2 reload data D1
PTM2 reload data D0 (LSB)
1
R/W
High
Low
00FF3A