
Philips Semiconductors
DSPCPU Operations for TM1300
PRODUCT SPECIFICATION
A-199
Sum of absolute values of unsigned 8-bit
differences
SYNTAX
[ IF rguard ] ume8uu rsrc1 rsrc2
→
rdest
FUNCTION
if
rguard
then
rdest
←
abs_val(zero_ext8to32(rsrc1<31:24>) – zero_ext8to32(rsrc2<31:24>)) +
abs_val(zero_ext8to32(rsrc1<23:16>) – zero_ext8to32(rsrc2<23:16>)) +
abs_val(zero_ext8to32(rsrc1<15:8>) – zero_ext8to32(rsrc2<15:8>)) +
abs_val(zero_ext8to32(rsrc1<7:0>) – zero_ext8to32(rsrc2<7:0>))
ATTRIBUTES
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
dspalu
26
2
No
—
2
1, 3
DESCRIPTION
As shown below, the
ume8uu
operation computes four separate differences of the four pairs of corresponding
unsigned 8-bit bytes of rsrc1 and rsrc2 The absolute values of the four differences are summed and the result is
written to rdest All computations are performed without loss of precision.
The
ume8uu
operation optionally takes a guard, specified in rguard If a guard is present, its LSB controls the
modification of the destination register. If the LSB of rguardis 1, rdestis written; otherwise, rdestis not changed.
EXAMPLES
Initial Values
Operation
Result
r80 = 0x0a14f6f6, r30 = 0x1414ecf6
r10 = 0, r80 = 0x0a14f6f6, r30 = 0x1414ecf6
r20 = 1, r90 = 0x64649c9c, r40 = 0x649c649c
r40 = 0x649c649c, r90 = 0x64649c9c
r50 = 0x80808080, r60 = 0x7f7f7f7f
ume8uu r80 r30
→
r100
IF r10 ume8uu r80 r30
→
r70
IF r20 ume8uu r90 r40
→
r110
ume8uu r40 r90
→
r120
ume8uu r50 r60
→
r125
r100
←
0x14
no change, since guard is false
r110
←
0x70
r120
←
0x70
r125
←
0x4
0
1
3
rsrc1
0
1
3
rsrc2
0
3
rdest
+
| |
| |
| |
| |
2
7
2
7
unsigned
unsigned
unsigned
unsigned
unsigned
unsigned
unsigned
unsigned
unsigned
SEE ALSO
ume8ii
ume8uu