
TM1300 Data Book
Philips Semiconductors
A-70
PRODUCT SPECIFICATION
Hardware 32-bit store with displacement
SYNTAX
[ IF rguard ] h_st32d(d) rsrc1 rsrc2
FUNCTION
if
rguard
then {
if
PCSW.bytesex = LITTLE_ENDIAN
then
bs
←
3
else
bs
←
0
mem[rsrc2+ d+ (3
⊕
bs)]
←
rsrc1<7:0>
mem[rsrc2+ d+ (2
⊕
bs)]
←
rsrc1<15:8>
mem[rsrc2+ d+ (1
⊕
bs)]
←
rsrc1<24:16>
mem[rsrc2+ d+ (0
⊕
bs)]
←
rsrc1<31:24>
}
ATTRIBUTES
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
dmem
31
2
7 bits
–256..252 by 4
n/a
4, 5
DESCRIPTION
The
h_st32d
operation stores all 32 bits of rsrc1 into the memory locations pointed to by the address in rsrc2 + d
The d value is an opcode modifier, must be in the range –256 and 252 inclusive, and must be a multiple of 4. This
store operation is performed as little-endian or big-endian depending on the current setting of the bytesex bit in the
PCSW.
If
h_st32d
is misaligned (the memory address computed by rsrc2+ dis not a multiple of 4), the result of
h_st32d
is undefined, and the MSE (Misaligned Store Exception) bit in the PCSW register is set to 1. Additionally, if the
TRPMSE (TRaP on Misaligned Store Exception) bit in PCSW is 1, exception processing will be requested on the next
interruptible jump.
The
h_st32d
operation optionally takes a guard, specified in rguard If a guard is present, its LSB controls the
modification of the addressed memory locations (and the modification of cache if the locations are cacheable). If the
LSB of rguard is 1, the store takes effect. If the LSB of rguard is 0,
h_st32d
has no side effects whatever; in
particular, the LRU and other status bits in the data cache are not affected.
EXAMPLES
Initial Values
Operation
Result
r10 = 0xcfc, r80 = 0x44332211
h_st32d(4) r80 r10
[0xd00]
←
0x44, [0xd01]
←
0x33,
[0xd02]
←
0x22, [0xd03]
←
0x11
no change, since guard is false
r50 = 0, r20 = 0xd0b,
r70 = 0xaabbccdd
r60 = 1, r30 = 0xd0c,
r70 = 0xaabbccdd
IF r50 h_st32d(–8) r70 r20
IF r60 h_st32d(–8) r70 r30
[0xd04]
←
0xaa, [0xd05]
←
0xbb,
[0xd06]
←
0xcc, [0xd07]
←
0xdd
SEE ALSO
st32 st32d st16 st16d st8
st8d readpcsw ijmpf
h_st32d