
Philips Semiconductors
DSPCPU Operations for TM1300
PRODUCT SPECIFICATION
A-67
Dual clipped absolute value of signed 16-bit
halfwords
SYNTAX
[ IF rguard ] h_dspidualabs r0 rsrc2
→
rdest
FUNCTION
if
rguard
then {
temp1
←
sign_ext16to32(rsrc2<15:0>)
temp2
←
sign_ext16to32(rsrc2<31:16>)
if
temp1 = 0xffff8000
then
temp1
←
0x7fff
if
temp2 = 0xffff8000
then
temp2
←
0x7fff
if
temp1 < 0
then
temp1
←
–temp1
if
temp2 < 0
then
temp2
←
–temp2
rdest<31:16>
←
temp2<15:0>
rdest<15:0>
←
temp1<15:0>
}
ATTRIBUTES
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
dspalu
72
2
No
—
2
1, 3
DESCRIPTION
The h_
dspidualabs
operation performs two 16-bit clipped, signed absolute value computations separately on the
high and low 16-bit halfwords of rsrc2. Both absolute values are clipped into the range [0x0..0x7fff] and written into the
corresponding halfwords of rdest All values are signed 16-bit integers. This operation requires a zero as first
argument. The programmer is advised to use the
dspidualabs
pseudo operation instead.
The h_
dspidualabs
operation optionally takes a guard, specified in rguard If a guard is present, its LSB controls
the modification of the destination register. If the LSB of rguardis 1, rdestis written; otherwise, rdestis not changed.
EXAMPLES
Initial Values
Operation
Result
r30 = 0xffff0032
r10 = 0, r40 = 0x80008001
r20 = 1, r40 = 0x80008001
r50 = 0x0032ffff
r90 = 0x7fffffff
h_dspidualabs r0 r30
→
r60
IF r10 h_dspidualabs r0 r40
→
r70
IF r20 h_dspidualabs r0 r40
→
r100
h_dspidualabs r0 r50
→
r80
h_dspidualabs r0 r90
→
r110
r60
←
0x00010032
no change, since guard is false
r100
←
0x7fff7fff
r80
←
0x00320001
r110
←
0x7fff0001
SEE ALSO
dspidualabs dspiabs
dspidualadd dspidualmul
dspidualsub dspiabs
h_dspidualabs