
Philips Semiconductors
DSPCPU Operations for TM1300
PRODUCT SPECIFICATION
A-191
Unsigned 8-bit load
pseudo-op for uld8d(0)
SYNTAX
[ IF rguard ] uld8 rsrc1
→
rdest
FUNCTION
if
rguard
then
rdest
←
zero_ext8to32(mem[rsrc1)
ATTRIBUTES
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
dmem
8
1
No
—
3
4, 5
DESCRIPTION
The
uld8
operation is a pseudo operation transformed by the scheduler into an
uld8d(0)
with the same
argument. (Note: pseudo operations cannot be used in assembly source files.)
The
uld8
operation loads the 8-bit memory value from the address contained in rsrc1 zero extends it to 32 bits,
and writes the result in rdest This operation does not depend on the bytesex bit in the PCSW since only a single byte
is loaded.
The result of an access by
uld8
to the MMIO address aperture is undefined; access to the MMIO aperture is
defined only for 32-bit loads and stores.
The
uld8
operation optionally takes a guard, specified in rguard If a guard is present, its LSB controls the
modification of the destination register and the occurrence of side effects. If the LSB of rguardis 1, rdestis written and
the data cache status bits are updated if the addressed location is cacheable. if the LSB of rguard is 0, rdest is not
changed and
uld8
has no side effects whatever.
EXAMPLES
Initial Values
Operation
Result
r10 = 0xd00, [0xd00] = 0x22
r30 = 0, r20 = 0xd04, [0xd04] = 0x84
r40 = 1, r20 = 0xd04, [0xd04] = 0x84
r50 = 0xd01, [0xd01] = 0x33
uld8 r10
→
r60
IF r30 uld8 r20
→
r70
IF r40 uld8 r20
→
r80
uld8 r50
→
r90
r60
←
0x00000022
no change, since guard is false
r80
←
0x00000084
r90
←
0x00000033
SEE ALSO
ild8 uld8d ild8d uld8r
ild8r
uld8