參數(shù)資料
型號(hào)： PCF5083
廠商： NXP Semiconductors N.V.
英文描述： STEEL COVER
中文描述： GSM信號(hào)處理IC
文件頁(yè)數(shù)： 59/136頁(yè)
文件大?。?/td> 602K
代理商： PCF5083
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1996 Oct 29
59
Philips Semiconductors
Objective specification
GSM signal processing IC
PCF5083
The host can be used in three modes:
1.
Acknowledge mode:
in this mode the PCF5083
provides an open drain output DTACK, that
acknowledges data read or write accesses to the host
port registers PI, PO or PIOS. This signal has to be
connected to the 90CL301 DTACK input. Using the
hardware handshake via DTACK, the 90CL301 can
write data to the PI register at any time. It is not
necessary to poll the PISE bit in the status register
PIOS. If the 90CL301 writes to PI and PI is still full, the
write access is automatically extended until the DSP
has read PI. Under worst case conditions this will last
10
μ
s (see formula below). Before reading a message
via PO however, the System Controller has to check
once if a message is available from DSP. This is done
by polling the POSE flag in the PIOS register. If POSE
is a logic 1 the System Controller has to read the first
word of the message. After determination of the
message length, the rest of the message can be read
without further polling.
Polling mode:
in this mode the hardware handshake
via DTACK is not used. Before writing a word to PI, the
90CL301 must wait until the PISE flag in the Status
Register PIOS is set. Correspondingly, the 90CL301
must wait until the POSE flag in PIOS is set, before
reading PO.
Interrupt mode:
in this mode the PCF5083 provides
two internal interrupt request signals PIRQN and
PORQN. Signal PIRQN (active LOW) corresponds to
status register bit PISE (active HIGH) and PORQN
(active LOW) to bit POSF (active HIGH). As soon as
the status bit PISE or POSF is set, PIRQN/PORQN is
going LOW, generating an interrupt at the host. The
interrupt service routines should handle the two 8-bit
transfers. After the first transfer PIRQN/PORQN goes
HIGH, removing the interrupt source. After the second
transfer a new interrupt will be generated.
PIRQN and PORQN can be enabled by setting PIOS
bit 2 for PIRQ_EN and bit 3 for PIRQ_EN to HIGH.
After reset both signals are disabled. The PIRQN and
PORQN interrupt condition is signalled via the
HIPR_INT interrupt line (see Section 10.2).
2.
3.
Command and indication messages are buffered in
two queues, each of 139 words. If working in acknowledge
mode the layer 1 software in the 90CL301 has to ensure
that no queue overflow occurs (this will never happen
during normal operation).
The times TPI and TPO required by the DSP to receive or
transmit a message consisting of N words can be
calculated according to the following formulas:
TPI = 10
μ
s + (N
1)
×
1.5
μ
s
TPO = N
×
1.5
μ
s
Data transfer in acknowledge mode produces the least
overhead in the 90CL301 layer 1 software. It is therefore
recommended to use the acknowledge mode for
communication with the DSP.
9.1.7
E
VENT
C
OUNTER
C
LOCK
The event counter is used by the firmware for time-out
detection.The 32.768 kHz clock is internally connected to
the ECLK input of the DSP.
9.1.8
G
ENERAL
P
URPOSE
I/O P
INS
Table 51
Usage of General Purpose I/O Pins
Note that the IO1 pin is not changed automatically by the
DSP firmware (e.g. by the procedure MP_iom2_enable).
Whenever audio data should be transmitted via the audio
interface, IO1 has to be set explicitly by calling the
procedure DB_write_register:
DB_write_register(11, 0x0100, 1) sets the IO1 bit in
register SIOC
DB_write_register(11, 0x0100, 2) resets the IO1 bit in
register SIOC.
PIN
RESET
DEFAULT
DESCRIPTION
IO1
0
Audio interface of the timer core
select pin. A logic 1 enables the
interface; a logic 0 disables the
interface.
used for procedure trace
used for procedure trace
DTX select pin. A logic 1 enables
the transmitter; a logic 0 disables
the transmitter.
IO2
IO3
IO4
1
1
1
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參數(shù)描述
PCF5083H/001/F2 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:GSM signal processing IC
PCF5083H/5V2/F3 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:GSM signal processing IC
PCF5083H/F2 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:GSM signal processing IC
PCF51AC128ACFUE 功能描述:32位微控制器 - MCU 32 Bit 128K FLASH 32K RAM CAN EN RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:90 MHz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT
PCF51AC128ACLKE 功能描述:32位微控制器 - MCU 32 Bit 128K FLASH 32K RAM CAN EN RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:90 MHz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT
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