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參數(shù)資料
| 型號： | PCF5083 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | STEEL COVER |
| 中文描述： | GSM信號處理IC |
| 文件頁數(shù)： | 31/136頁 |
| 文件大?。?/td> | 602K |
| 代理商： | PCF5083 |
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1996 Oct 29
31
Philips Semiconductors
Objective specification
GSM signal processing IC
PCF5083
8.3.3.3
Sleep Clock Calibration
Since the ratio between the quarterbit clock and the sleep
clock may vary, an accurate value for the increment
SQBC_INC can be obtained with the following procedure:
1.
Set QBCCTRL_REG[CAL] = 1 to enable the
calibration mode.
2.
The calibration procedure lasts for 8 seconds.
3.
After calibration, the CAL flag in QBCCTRL_REG is
automatically cleared. After 1 ms the register
SQBCINC_REG holds the lower 8 bits of the
increment value and can be used to verify the
calibration process. The maximum allowed frequency
deviation is
23.8 kHz to +25.4 kHz at 13 MHz and
63.6 Hz to +60.3 Hz at 32.768 kHz.
During the calibration procedure, the 13 MHz master clock
may not be switched off. Therefore, REFON stays active
even if the Sleep mode is enabled.
The calibration procedure has to be repeated from time to
time, because the exact frequency of the 13 MHz as well
as the 32 kHz clock may change.
After power up, the calibration procedure must be
performed before the Sleep mode can be activated.
8.3.3.4
Reduced Sleep mode
During reduced Sleep mode the mobile timing is
maintained with the quarterbit counter. The sleep
quarterbit counter is not used. For the System Controller
all timings are as in Sleep mode. The signal REFON is
always active. All other Sleep mode signals (GPON1 etc.)
are activated as during Sleep mode. The reduced Sleep
mode is invoked with QBCCTRL_REG[SLEEP] = 1 and
QBCCTRL_REG[SLEEPRED] = 1.
8.3.3.5
From Sleep mode to Normal mode
The PCF5083 is forced into a wake-up state if the
hardware control interrupt HWCTRL_INT is asserted
internally (caused by the ON/OFF monitor, MMI
power-down unit or real time clock). The interrupt line
COMB_INT is not asserted but the interrupt stays pending
internally until Sleep mode is finished.
If the PCF5083 enters the wake-up state and
SLEEPCNT_REG is less than or equal to REFON_REG,
the Sleep mode terminates normally. Otherwise, if
SLEEPCNT_REG is greater than REFON_REG,
REFON_REG is copied to SLEEPCNT_REG instead of
SLEEPCNT_REG being decremented at the next frame
boundary and the Sleep mode terminates with reduced
duration. The maximum delay from any wake-up request
to the end of the wake-up procedure depends on the
setting of REFON_REG and is 64
×
4.6 ms = 294.4 ms.
After entering the normal mode again FRAMECNT_REG
shows the number of actually slept frames. If the Sleep
mode terminated normally, this number equals the number
SLEEPCNT_REG previously was programmed with.
The System Controller now has to set up the timing
generator mode for the next frame. With the beginning of
the next frame the PCF5083 enters the normal operation
again.
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相關(guān)代理商/技術(shù)參數(shù) |
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| PCF5083H/001/F2 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:GSM signal processing IC |
| PCF5083H/5V2/F3 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:GSM signal processing IC |
| PCF5083H/F2 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:GSM signal processing IC |
| PCF51AC128ACFUE | 功能描述:32位微控制器 - MCU 32 Bit 128K FLASH 32K RAM CAN EN RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT |
| PCF51AC128ACLKE | 功能描述:32位微控制器 - MCU 32 Bit 128K FLASH 32K RAM CAN EN RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT |
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