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| 型號(hào)： | PCF5083 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | STEEL COVER |
| 中文描述： | GSM信號(hào)處理IC |
| 文件頁(yè)數(shù)： | 47/136頁(yè) |
| 文件大?。?/td> | 602K |
| 代理商： | PCF5083 |
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1996 Oct 29
47
Philips Semiconductors
Objective specification
GSM signal processing IC
PCF5083
9.1.4
A
UDIO INTERFACE
9.1.4.1
Downlink speech frame format
Every 20 ms the speech decoder in the DSP outputs a speech frame consisting of 160 16-bit words. These speech
frames are transmitted to the PCM codec. The speech frame format is described in Table 32.
Table 31
Field descriptions
Table 32
Downlink speech frame format
FIELD
DESCRIPTION
SAMPLE
This field contains the 13-bit linear PCM audio samples in two’s complement (MSB = sign bit)
representation as defined by the “GSM recommendation 06.01”
Whenever the speech decoder is active the PARM field is used to transfer the speech parameters
(D1 to D260) together with some frame classification information (see Table 99) and the currently
selected test mode (see Table 34) out of the DSP. The terms SP (speech flag), SID (silence descriptor)
and MUF (muting flag) are defined in “GSM Rec. 06.31”(DTX for full-rate speech TCH). The HF bit
indicates, whether the speech codec is operating in handsfree mode (HF = 1) or not. The bits TM2 to TM0
are intended to be evaluated by an external Digital Audio Interface (DAI). They determine the currently
selected test mode during type approval as described in “GSM Rec. 11.10, Section III.1.2.4.7”
TM2 to TM0 are passed in the TMODE file of the operation_mode parameter of the speech decoder
procedure. Refer to Section 9.3.1 for more information.
Synchronization signal for external (test) equipment. Marks the 20 ms speech frames. Each falling edge
of SYNC marks the beginning of a new output speech frame and with a constant offset due to internal
module processing time the rising edge of SYNC marks a new input speech frame. As soon as audio
output data are available this bit always reflects the internal speech frame timing independently of other
processing tasks of the DSP.
PARM
SYNC
OFFSET
SAMPLE FIELD
PARM FIELD
SYNC FIELD
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
1
2
audio sample 0
audio sample 1
audio sample 2
audio samples 3 to 27
audio sample 28
audio sample 29
audio sample 30
audio sample 31
audio samples 32 to 157
audio sample 158
audio sample 159
TM1
HF
0
TM0
TM2
0
0
0
.
.
0
.
.
.
.
.
1
3 to 27
28
29
30
31
32 to 157
158
159
not used
SID
MUF
D2
D4
.
D258
D260
0
SP
D1
D3
.
D257
D259
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| PCF5083H/001/F2 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:GSM signal processing IC |
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| PCF51AC128ACFUE | 功能描述:32位微控制器 - MCU 32 Bit 128K FLASH 32K RAM CAN EN RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:90 MHz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT |
| PCF51AC128ACLKE | 功能描述:32位微控制器 - MCU 32 Bit 128K FLASH 32K RAM CAN EN RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:90 MHz 程序存儲(chǔ)器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT |
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