參數(shù)資料
型號： PCF5083
廠商： NXP Semiconductors N.V.
英文描述： STEEL COVER
中文描述： GSM信號處理IC
文件頁數(shù)： 105/136頁
文件大?。?/td> 602K
代理商： PCF5083
1996 Oct 29
105
Philips Semiconductors
Objective specification
GSM signal processing IC
PCF5083
Table 84
Combined Interrupt Register
Note
1.
RSTx = 0 means reset condition if either RSTO or RSTC is asserted; ‘
’ denotes not affected from reset line.
During reset (RST, RSTO, RSTC) only those registers with an explicitly given reset value are affected. All other
registers are undefined and have to be set by the controller.
Table 85
High Priority Interrupt Register
Notes
1.
RSTx = 0 means reset condition if either RSTO or RSTC is asserted; ‘
’ denotes not affected from reset line.
During reset (RST, RSTO, RSTC) only those registers with an explicitly given reset value are affected. All other
registers are undefined and have to be set by the controller.
To clear these interrupt flags, the corresponding location has to be written with a logic 1.
2.
BIT
R/W
SYMBOL
OPERATION (if bit is set)
RST = 0
0
RSTx = 0
(1)
0
1
2
3
R
R
R
HWCTRL_INT
IOM_INT
SI_INT
HWCTRL_MASK
HWCTRL_INT interrupt was activated.
IOM_INT interrupt was activated.
SI_INT interrupt was activated.
Enable the HWCTRL_INT interrupt to assert the
COMB_INT interrupt line.
Enable the IOM_INT interrupt to assert the COMB_INT
interrupt line.
Enable the SI_INT interrupt to assert the COMB_INT
interrupt line.
R/W
4
R/W
IOM_MASK
0
5
R/W
SI_MASK
0
BIT
R/W
SYMBOL
RX_INT
(2)
OPERATION (if bit is set)
RST = 0
RSTx = 0
(1)
0
R/W
Assert the HIPR_INT interrupt line when the RX_REG
is sent via the RF Bus.
Assert the HIPR_INT interrupt line when the TX_REG
is sent via the RF Bus prior to a MON burst in the TX
timeslot.
Assert the HIPR_INT interrupt line when the TX_REG
is sent via the RF Bus prior to a TX burst.
Assert the HIPR_INT interrupt line when the
MON_REG is sent via the RF Bus.
Assert the HIPR_INT interrupt line when the
DACOFF_REG is sent via the RF Bus.
Assert the HIPR_INT interrupt line at the beginning of
every TDMA frame.
Assert the HIPR_INT interrupt line if the DSP core host
port input request is active.
Assert the HIPR_INT interrupt line if the DSP core host
port output request is active.
0
1
R/W
RXTX_INT
(2)
0
2
R/W
TX_INT
(2)
0
3
R/W
MON_INT
(2)
0
4
R/W
AS_INT1
(2)
0
5
R/W
FRAME_INT
(2)
0
6
R
PIRQN_INT
0
7
R
PORQN_INT
0
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相關代理商/技術參數(shù)
參數(shù)描述
PCF5083H/001/F2 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:GSM signal processing IC
PCF5083H/5V2/F3 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:GSM signal processing IC
PCF5083H/F2 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:GSM signal processing IC
PCF51AC128ACFUE 功能描述:32位微控制器 - MCU 32 Bit 128K FLASH 32K RAM CAN EN RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT
PCF51AC128ACLKE 功能描述:32位微控制器 - MCU 32 Bit 128K FLASH 32K RAM CAN EN RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT
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