參數(shù)資料
型號: PCF5083
廠商: NXP Semiconductors N.V.
英文描述: STEEL COVER
中文描述: GSM信號處理IC
文件頁數(shù): 109/136頁
文件大小: 602K
代理商: PCF5083
1996 Oct 29
109
Philips Semiconductors
Objective specification
GSM signal processing IC
PCF5083
Table 92
IOM
-2 Interface Control Register
Note
1.
RSTx = 0 means reset condition if either RSTO or RSTC is asserted; ‘
’ denotes not affected from reset line.
During reset (RST, RSTO, RSTC) only those registers with an explicitly given reset value are affected. All other
registers are undefined and have to be set by the controller.
Table 93
IOM
-2 Interface Interrupt Enable Register
Note
1.
RSTx = 0 means reset condition if either RSTO or RSTC is asserted; ‘
’ denotes not affected from reset line.
During reset (RST, RSTO, RSTC) only those registers with an explicitly given reset value are affected. All other
registers are undefined and have to be set by the controller.
BIT
R/W
SYMBOL
OPERATION (if bit is set)
RST = 0
RSTx = 0
(1)
0
1
2
3
4
5
6
7
R/W
R/W
R
R
R/W
R/W
R
R
TABORT0
TABORT1
RABORT0
RABORT1
TEOM0
TEOM1
REOM0
REOM1
Monitor master 0 transmit abort request
Monitor master 1 transmit abort request
Monitor master 0 receive abort request
Monitor master 1 receive abort request
Monitor master 0 transmit end of message
Monitor master 1 transmit end of message
Monitor master 0 receive end of message
Monitor master 1 receive end of message
0
0
0
0
0
0
0
0
BIT
R/W
SYMBOL
OPERATION (if bit is set)
RST = 0
RSTx = 0
(1)
0
R/W
MON0_IBF_EN
Enable the MON0_IBF flag to assert the IOM_INT
interrupt condition.
Enable the MON0_OBE flag to assert the IOM_INT
interrupt condition.
Enable the MON1_IBF flag to assert the IOM_INT
interrupt condition.
Enable the MON1_OBE flag to assert the IOM_INT
interrupt condition.
Enable the CI0_IBF flag to assert the IOM_INT
interrupt condition.
Enable the CI0_OBE flag to assert the IOM_INT
interrupt condition.
Enable the CI1_IBF flag to assert the IOM_INT
interrupt condition.
Enable the CI1_OBE flag to assert the IOM_INT
interrupt condition.
0
1
R/W
MON0_OBE_EN
0
2
R/W
MON1_IBF_EN
0
3
R/W
MON1_OBE_EN
0
4
R/W
CI0_IBF_EN
0
5
R/W
CI0_OBE_EN
0
6
R/W
CI1_IBF_EN
0
7
R/W
CI1_OBE_EN
0
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