參數(shù)資料
型號： ORT8850L-3BM680C
廠商： Lattice Semiconductor Corporation
文件頁數(shù)： 36/105頁
文件大?。?/td> 0K
描述： IC FPSC TRANSCEIVER 8CH 680-BGA
產(chǎn)品變化通告： Product Discontinuation 01/Aug/2011
標準包裝： 24
系列： *
Lattice Semiconductor
ORCA ORT8850 Data Sheet
36
mover is active, there is no xed timing relationship between the data sent to the FPSC and DOUTxx_FP and the
DOUTxx_SPE and DOUTxx_C1. J1 signals should be used instead to determine data alignment within the frame.)
The framer algorithm determines the out-of-frame/in-frame status of the incoming data and will cause alarms on
both an errored frame and an OOF (out-of-frame) state. Functions performed by this block include:
A1-A2 framing pattern detection. (Framing similar to SONET specication)
Generation of timing and an 8kHz frame pulse.
Detections of Out Of Frame (OOF) (generates an alarm).
Errored frame detection (increments error counter).
Framer State Machine
Figure 17 shows the state machine for the framer. Because the ORT8850 is primarily intended for use between
itself and another ORT8850 or other devices via a backplane, there is only one errored frame state. Thus there is
no Severely Errored Frame (SEF) or Loss-Of-Frame (LOF) indication.
Figure 17. Framer State Machine
OOF State
This is the initial state for the state machine after a reset. In this state the A1 pattern is searched for on every clock
cycle. A second stage of comparison is implemented to locate the A1/A2 transition. When the A1/A2 transition is
found, the following occurs:
The state machine moves from the OOF state to the Frame Conrm State.
The A1offset for the byte start location is locked.
Row and column counters are set
Frame Conrm State
In this state the A1/A2 transition is only compared for at the appropriate location, i.e. beginning at the 12th A1 loca-
tion. This location is determined from the row and column counters which were set at the transition from OOF to
Frame Conrm. If at this time the comparison fails, the state machine reverts to the OOF state. If the comparison
Notes:
1)
Row and column counters are only set/reset by a state transition from the OOF state to to the Frame Confirm state.
2)
“Expect A1/A2” means that the row and column counters have counted to the place for the last (12 th.) A1 byte and
that the next byte should be an A2 byte.
Expect A1/A2
AND Find A1/A2
AND 4 Consecutive
Correct A1/A2
Transitions Detected
Expect A1/A2
AND Find A1/A2
AND <4 Consecutive
Correct A1/A2
Transitions Detected
Expect A1/A2
AND Find A1/A2
Expect A1/A2
AND Find A1/A2
Expect A1/A2
AND do NOT
Find A1/A2
- Find A1/A2 Transition
- Lock Barrel Shifter
- Set row and column counters
Frame
Confirm
In
Frame
Errored
Frame
Out Of Frame
(OOF)
Reset
Expect A1/A2
AND do NOT
Find A1/A2
Expect A1/A2
AND do NOT
Find A1/A2
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