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Lattice Semiconductor
ORCA ORT8850 Data Sheet
24
Channel Alignment, Transparent TOH: Table 5 lists the register values to setup the ORT8850 as 4 Channel align-
ment SONET channels using transparent TOH. The order is specic. The values are given from the PowerPC point
of view. If using the MPI to write data to the ORT8850, the value given in the table is the value that should be used.
If using the UMI of the system bus, the data value would need to be byte ipped.
Table 5. Channel Alignment, Transparent TOH
Register
Address
Value
Description
Initial Register Settings
0x30004
0x05
Lock register. This value must be written to allow writing to any other ORT8850 core register
0x30005
0x80
Lock register. This value must be written to allow writing to any other ORT8850 core register
0x30020
0x47
Turn on Channel AA in functional mode with AIS-L
0x30021
0xFF
Channel AA - Transparent TOH from parallel data
0x30022
0xFF
Channel AA - Transparent TOH from parallel data
0x30037
0x08
Channel AA- Aligned by 4 (Quad A)
0x30038
0x47
Turn on Channel AB function mode with AIS-L
0x30039
0xFF
Channel AB - Transparent TOH from parallel data
0x3003A
0xFF
Channel AB - Transparent TOH from parallel data
0x3004F
0x08
Channel AB - Aligned by 4 (Quad A)
0x30050
0x47
Turn on Channel AC function mode with AIS-L
0x30051
0xFF
Channel AC - Transparent TOH from parallel data
0x30052
0xFF
Channel AD - Transparent TOH from parallel data
0x30067
0x08
Channel AC- Aligned by 4 (Quad A)
0x30068
0x47
Turn on Channel AD function mode with AIS-L
0x30069
0xFF
Channel AD- Transparent TOH from parallel data
0x3006A
0xFF
Channel AD - Transparent TOH from parallel data
0x3007F
0x08
Channel AC- Aligned by 4 (Quad A)
0x30080
0x47
Turn on Channel BA function mode with AIS-L
0x30081
0xFF
Channel BA- Transparent TOH from parallel data
0x30082
0xFF
Channel BA- Transparent TOH from parallel data
0x30097
0x08
Channel BA- Aligned by 4 (Quad B)
0x30098
0x47
Turn on Channel BB function mode with AIS-L
0x30099
0xFF
Channel BB- Transparent TOH from parallel data
0x3009A
0xFF
Channel BB - Transparent TOH from parallel data
0x300AF
0x08
Channel BB - Aligned by 4 (Quad B)
0x300B0
0x47
Turn on Channel BC function mode with AIS-L
0x300B1
0xFF
Channel BC - Transparent TOH from parallel data
0x300B2
0xFF
Channel BC - Transparent TOH from parallel data
0x300C7
0x08
Channel BC - Aligned by 4 (Quad B)
0x300C8
0x47
Turn on Channel BD function mode with AIS-L
0x300C9
0xFF
Channel BD - Transparent TOH from parallel data
0x300CA
0xFF
Channel BD - Transparent TOH from parallel data
0x300DF
0x08
Channel BD - Aligned by 4 (Quad B)
Wait for 4 SONET Frames to establish an in-frame state (~500us)
0x30018
0x0C
Alignment command to resync Quad A and Quad B, then modify register settings as
follows. Write 0x00 to clear register for normal operation.
0x30020
0x07
Channel AA in functional mode without AIS-L