參數(shù)資料
型號: MC68838FCC
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 1 CHANNEL(S), 125M bps, FDDI CONTROLLER, CQFP120
封裝: CERAMIC, QFP-120
文件頁數(shù): 69/100頁
文件大小: 465K
代理商: MC68838FCC
MOTOROLA
MC68838 USER’S MANUAL
7-5
The T-bit on a FRAME_STATUS transfer indicates that the MAC thinks that it sent this
frame (from the FSI), and the system can attempt to associate this frame status with a
previously transmitted frame. Normally, the T-bit equals (SS field <> 00) and NOT (MAC
OR VOID frame), in which SS is the SA match field of the preceding END_DATA transfer.
The T-bit is also zero for fragments and format errors. The T-bit can be one when the
associated SS field = 00. This state occurs when an END_DATA transpires before the
SA field is received (hence, SS contains the default 00 value), but the frame continues to
be received by the MAC, and the MAC subsequently recognizes it and sends this frame
when the SA field arrives. This state can only happen when the reason field indicates an
FSI abort or a DA mismatch.
The MAC uses the RABORT signal to determine if the C control indicator should be set at
the end of the present received frame. The MAC only examines this signal during the
reception of a packet (i.e., during receive data transfers) and ignores the signal during
FILLER, START_DATA, END_DATA, and FRAME_STATUS transfers. The FSI need only
assert RABORT (high) for a single data transfer cycle for the MAC to recognize it. The FSI
must negate RABORT immediately upon detection of an END_DATA transfer. This signal
must be synchronous with BYTCLK.
START_DATA
DATA
FILLER
END_DATA
FILLER
FRAME_STATUS
Figure 7-1. Receive Data Flowchart
ARCHIVE
INFORMA
TION
ARCHIVE
INFORMA
TION
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