- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98011 > MC68838FCC (MOTOROLA INC) 1 CHANNEL(S), 125M bps, FDDI CONTROLLER, CQFP120 PDF資料下載
參數(shù)資料
| 型號： | MC68838FCC |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), 125M bps, FDDI CONTROLLER, CQFP120 |
| 封裝： | CERAMIC, QFP-120 |
| 文件頁數(shù)： | 39/100頁 |
| 文件大?。?/td> | 465K |
| 代理商： | MC68838FCC |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁當(dāng)前第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁
MOTOROLA
MC68838 USER’S MANUAL
3- 23
3.3.3 Interrupt Event Register C (INTR_EVENT_C)
15
14
13
12
11
10
9
8
00000000
76543210
0
VOID_TIMER_
REG_RDY
VOID_TIMER _
OVF
TKN_CNT_OVF
Bits 15–3—These bits are reserved and should be set to zero.
VOID_TIMER_REG_RDY—Void Timer Register Ready
This bit is set when the void timer loads the void time register with a new count.
VOID_TIMER_REG_RDY indicates that a new timing of the ring latency was done and
the void time register contains the updated latency time.
VOID_TIMER_OVF—Void Timer Overflow Bit
This bit is set when the void timer count exceeds 64K, causing the timer to wrap around.
Thus, the void time register will not be loaded. This bit can indicate configuration
problems in the ring.
TKN_CNT_OVF—Token Counter Overflow Bit
This bit is set when the token counter exceeds 64K. The token counter wraps around to
zero and continues to count. This bit indicates that the token count value is not accurate
because there is no way of determining how many times the counter has wrapped.
3.3.4 Interrupt Mask Register A (INTR_MASK_A)
This register implements part of the interrupt mask register corresponding to interrupt
mask register A. Each interrupt mask register corresponds bit for bit with the interrupt
event register. When a bit in this register is set and the corresponding bit in the interrupt
event register is also one, an interrupt is generated. This register is only read by the MAC
chip. lt can be read and written by the NP at any time. lt is cleared on power-up reset and
unaffected by a MAC_RESET.
3.3.5 Interrupt Mask Register B (INTR_MASK_B)
This register implements part of the interrupt mask register corresponding to interrupt
mask register B. Each interrupt mask register corresponds bit for bit with the interrupt
event register. When a bit in this register is set and the corresponding bit in the interrupt
event register is also one, an interrupt is generated. This register is only read by the MAC
chip. lt can be read and written by the NP at any time. lt is cleared on power-up reset and
is unaffected by a MAC_RESET.
3.3.6 Interrupt Mask Register C (INTR_MASK_C)
This register implements part of the interrupt mask register corresponding to interrupt
mask register C. Each interrupt mask register corresponds bit for bit with the interrupt
ARCHIVE
INFORMA
TION
ARCHIVE
INFORMA
TION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68EC020FG | 32-BIT, 25 MHz, MICROCONTROLLER, PQFP100 |
| MC68HC05CC1P | 8-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PDIP40 |
| MC68HC05CC2B | 8-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PDIP42 |
| MC68HC05CT4FN | 8-BIT, MROM, 2.048 MHz, MICROCONTROLLER, PQCC44 |
| MC68HC05J1P | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP20 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68840FE25B | 制造商:Motorola Inc 功能描述:68840FE25B |
| MC68840FE-25B | 制造商:Motorola Inc 功能描述:68840FE-25B |
| MC6885 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:HEX THREE-STATE BUFFER/INVERTERS |
| MC68851 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:32-Bit Paged Memory Management Unit |
| MC6885L | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:HEX THREE-STATE BUFFER/INVERTERS |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。