
iv
MC68838 USER’S MANUAL
MOTOROLA
TABLE OF CONTENTS (Continued)
Paragraph
Page
Number
Title
Number
3.2.3
Receive Status Register (RX_STATUS).................................................3-13
3.2.4
Transmit Status Register (TX_STATUS) ................................................3-15
3.3
Interrupt Registers...........................................................................................3-17
3.3.1
Interrupt Event Register A (INTR_EVENT_A) ........................................3-17
3.3.2
Interrupt Event Register B (INTR_EVENT_B) ........................................3-20
3.3.3
Interrupt Event Register C (INTR_EVENT_C)........................................3-23
3.3.4
Interrupt Mask Register A (INTR_MASK_A)...........................................3-23
3.3.5
Interrupt Mask Register B (INTR_MASK_B)...........................................3-23
3.3.6
Interrupt Mask Register C (INTR_MASK_C)..........................................3-23
3.4
Counter Registers...........................................................................................3-24
3.4.1
Frame Count Register (FRAME_CT).......................................................3-25
3.4.2
Lost Count, Error Count Register (LOST_CTERROR_CT) .................3-25
3.4.3
Token Count Register (TOKEN_CT) .......................................................3-25
3.5
Station Parameter Registers.........................................................................3-25
3.5.1
My Short Address Register (MSA)...........................................................3-25
3.5.2
My Long Address Register (MLA_A, MLA_B, MLA_C)........................3-26
3.5.3
Target Request Time Register (T_REQ) .................................................3-26
3.5.4
TVX, TRT Initial Timer Parameter Register (TVX_VALUE, T_MAX) ..3-26
3.6
Protocol Timing Registers .............................................................................3-27
3.6.1
TVX Timer Register (TVX_TIMER)...........................................................3-27
3.6.2
TRT Timer Register (TRT_TIMER_A, TRT_TIMER_B)..........................3-27
3.6.3
THT Timer, Sent Count Registers (THT_TIMER_A,
THT_TIMER_B, SENT_COUNT)..............................................................3-28
3.6.4
TRT Time Remaining Register (T_NEG_A, T_NEG_B) .......................3-29
3.6.5
Information Field Register (INFO_REG_A).............................................3-29
3.6.6
Void Time Counter Register (VOID_TIME).............................................3-29
3.7
Internal Registers............................................................................................3-30
3.7.1
Revision Number Register (REV_NO_REG)..........................................3-30
3.7.2
Packet Request Register (PKT_REQUEST) ..........................................3-30
3.7.3
Built-In Self-Test Signature Register (BIST_SIGNATURE) ................3-31
3.7.4
Receive CRC Register (RX_CRC) ...........................................................3-32
3.7.5
Transmit CRC Registers (TX_CRC).........................................................3-32
Section 4
Signal Description
4.1
Clock Signals ..................................................................................................4-1
4.2
Node Processor Interface..............................................................................4-2
4.3
MAC-PHY Interface ........................................................................................4-3
4.4
Receive System Interface..............................................................................4-3
4.5
Transmit System Interface.............................................................................4-4
4.6
CAM Interface..................................................................................................4-5
4.7
Test Signals.....................................................................................................4-6
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