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參數(shù)資料
| 型號： | MC68838FCC |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), 125M bps, FDDI CONTROLLER, CQFP120 |
| 封裝： | CERAMIC, QFP-120 |
| 文件頁數(shù)： | 64/100頁 |
| 文件大?。?/td> | 465K |
| 代理商： | MC68838FCC |
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MOTOROLA
MC68838 USER’S MANUAL
7-1
SECTION 7
RECEIVE DATA PATH OPERATION
Data is received from the PHY layer ELM device over the RCDATx bus. A 10-bit data bus
(two symbols) is presented to the MAC synchronous to BYTCLK at a 25-MHz rate.
7.1 RECEIVE DATA PROCESSING
The received symbol pair is latched into the receive latch for processing. All received
data is repeated by looping the receive data path to the transmit data path unless the
MAC is removing a frame from the ring by sourcing idles (stripping) or is transmitting a
data frame or a protocol frame such as a beacon, claim, or token.
A frame may be copied by the MAC (i.e., presented to the receive data FSI) on the basis
of the current MAC configuration. A frame is copied when:
1. The MAC is in promiscuous mode, or
2. The DA field matches the MAC's individual address, or
3. The MAC is using a special filter mode such as COPY_lND_LLC or COPY_OWN,
or
4. The
MATCH or TR_BR_FWD signal from the CAM interface indicates that external
logic has recognized the DA field.
7.2 RECEIVE DATA SYSTEM INTERFACE
Data that is being copied is presented to the FSI over the receive data FSI. This section
discusses the state of the receive data FSI during and between the transfer of data
packets to the FSI.
The receive data FSI contains four signal buses: RPATHx, RPRITY, RCCTL4–RCCTL0,
and RABORT. The data symbol stream is presented on the RPATHx bus; data parity for
RPATHx is on the RPRITY. The RCCTLx bus contains signals that indicate the nature of
the data on RPATHx. RABORT is an abort signal from the FSI or other external logic to
indicate that the receive data FSI is unable to copy the current data.
7.3 RECEIVE DATA PATH OPERATION
RCCTLx can be logically divided into two sub-buses: RCCTL4–RCCTL3 are only
examined by the FSI packet transmission logic, and RCCTL2–RCCTL0 are for the FSI
reception logic. Table 7-1 illustrates the relationship between RCCTLx and RPATHx.
RCCTL4–RCCTL3 indicate the end of a token cycle and indicate that the data bus
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