參數(shù)資料
型號(hào): GS1582-IBE3
廠商: Gennum Corporation
英文描述: IC,MOT,MC145026P, DIP-16, ENCODER 9 LINE SIMPLEX
中文描述: 多速率的電纜驅(qū)動(dòng)器,音頻多路復(fù)用器和ClockCleaner⑩串行
文件頁(yè)數(shù): 81/114頁(yè)
文件大?。?/td> 1224K
代理商: GS1582-IBE3
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GS1582 Data Sheet
40117 - 1 November 2007
81 of 114
4.13.3.1 Video Registers
Table 4-43: Video Configuration and Status Registers
Address
Register Name
Bit
Description
R/W
Default
000h
Reserved
15-13
Reserved.
R
000b
TIM_861_PIN_EN
12
Selects pin for control for 861 timing converter.
Reference:
Section 4.3.2 on page 29
.
R/W
0
ANC_INS
11
Disable for ancillary data insertion feature.
Reference:
Section 4.8 on page 62
.
R/W
0
AUDIO_EMBED
10
Disable audio embedding.
Reference:
Section 4.7 on page 36
.
R/W
0
CEA_861
9
Disable 861 timing converter.
Reference:
Section 4.3.2 on page 29
.
R/W
0
H_CONFIG
8
Horizontal sync timing input configuration. Set LOW when
the H input timing is based on active line blanking
(default). Set HIGH when the H input timing is based on
the H bit of the TRS words.
Reference:
Section 4.3.1 on page 28
.
R/W
0
Reserved
7
Reserved.
R
0
352M_INS
6
SMPTE352M packet insertion. In HD mode, 352M
packets are inserted in the luma channel only when one
of the bytes in the VIDEO_FORMAT_A or
VIDEO_FORMAT_B registers are programmed with
non-zero values. Set HIGH to disable.
Reference:
Section 4.9.4.1 on page 69
.
R/W
0
ILLEGAL_REMAP
5
Illegal Code Remapping. Detection and correction of
illegal code words within the active picture area (AP). Set
HIGH to disable.
Reference:
Section 4.9.4.2 on page 71
.
R/W
0
EDH_CRC_INS
4
Error Detection & Handling (EDH) Cyclical Redundancy
Check (CRC) error correction. In SD mode the GS1582
will generate and insert EDH packets. Set HIGH to
disable.
Reference:
Section 4.9.4.3 on page 71
.
R/W
0
ANC_CSUM_INS
3
Ancillary Data Checksum insertion. Set HIGH to disable.
Reference:
Section 4.9.4.4 on page 73
.
R/W
0
CRC_INS
2
Luma and chroma line-based CRC insertion. In HD mode,
line-based CRC words are inserted in both the luma and
chroma channels. Set HIGH to disable
Reference:
Section 4.9.4.5 on page 73
.
R/W
0
LNUM_INS
1
Luma and chroma line number insertion - HD mode only.
Set HIGH to disable.
Reference:
Section 4.9.4.6 on page 73
.
R/W
0
TRS_INS
0
Timing Reference Signal Insertion. Set HIGH to disable.
Reference:
Section 4.9.4.7 on page 73.
R/W
0
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