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參數(shù)資料
| 型號： | GS1582-IBE3 |
| 廠商： | Gennum Corporation |
| 英文描述： | IC,MOT,MC145026P, DIP-16, ENCODER 9 LINE SIMPLEX |
| 中文描述： | 多速率的電纜驅(qū)動器，音頻多路復用器和ClockCleaner⑩串行 |
| 文件頁數(shù)： | 12/114頁 |
| 文件大?。?/td> | 1224K |
| 代理商： | GS1582-IBE3 |
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GS1582 Data Sheet
40117 - 1 November 2007
12 of 114
F3
DETECT_TRS
Non
Synchronous
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to select external HVF timing mode or TRS Extraction timing
mode.
When DETECT_TRS = LOW, the device will use timing from the
externally supplied H:V:F or CEA-861 timing signals, dependent on the
state of the TIM_861 pin.
When DETECT_TRS = HIGH, the device will extract timing from TRS
signals embedded in the supplied video stream.
F4
RSV
–
–
Reserved. Do not connect.
F10
RSET
Analog
Input
An external 1% resistor connected to this input is used to set the
SDO/SDO output amplitude.
G1, H10
IO_VDD
Non
Synchronous
Input
Power
Power supply connection for digital I/O buffers. Connect to +3.3V or
+1.8V DC digital.
G2, H9
IO_GND
Non
Synchronous
Input
Power
Ground connection for digital I/O buffers. Connect to digital GND.
G3
TIM_861
Non
Synchronous
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to select external CEA-861 timing mode.
When DETECT_TRS = LOW and TIM_861 = LOW, the device will use
externally supplied H:V:F timing signals.
When DETECT_TRS = LOW and TIM_861 = HIGH, the device will use
externally supplied HSYNC, VSYNC, DE timing signals.
When DETECT_TRS = HIGH, the device will extract timing from TRS
signals embedded in the supplied video stream.
G4
20bit/10bit
Non
Synchronous
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to select the input data bus width.
G5
DVB_ASI
Non
Synchronous
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
When set HIGH, the device is configured for the transmission of
DVB-ASI data in SD mode (SD/HD = HIGH).
When set LOW, the device will not support the encoding of DVB-ASI
data.
NOTE: When operating in DVB-ASI mode the SD/HD pin must be set
HIGH and SMPTE_BYPASS must be set LOW.
Table 1-1: Pin Descriptions (Continued)
Pin
Number
Name
Timing
Type
Description
相關PDF資料 |
PDF描述 |
|---|---|
| GS4900B | SD Clock and Timing Generator with GENLOCK |
| GS4900BCNE3 | SD Clock and Timing Generator with GENLOCK |
| GS4901B | SD Clock and Timing Generator with GENLOCK |
| GS4901BCNE3 | SD Clock and Timing Generator with GENLOCK |
| GS4910B | HD/SD/Graphics Clock and Timing Generator with GENLOCK |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| GS-158N | 制造商:Taiyo Electric Ind. 功能描述: |
| GS15A | 制造商:MEANWELL 制造商全稱:Mean Well Enterprises Co., Ltd. 功能描述:7.2~15WAC-DC Single Output Desktop |
| GS15A/B | 功能描述:插入式交流適配器 RoHS:否 制造商:Phihong 地區(qū):Universal 安裝風格:Wall, Interchangeable Plug 輸入電壓范圍:90 VAC to 264 VAC 輸出端數(shù)量:1 輸出功率額定值:5 W 輸出電壓（通道 1）:5 V 輸出電流（通道 1）:1 A 直流輸出連接器:USB Type A 隨附/必需的交流插頭:Required 商用/醫(yī)用:Commercial 效率:Level V |
| GS15A/B-2P1J | 制造商:Mean Well 功能描述: |
| GS15A/B-6P1J | 制造商:Mean Well 功能描述: |
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