參數(shù)資料
型號: GS1582-IBE3
廠商: Gennum Corporation
英文描述: IC,MOT,MC145026P, DIP-16, ENCODER 9 LINE SIMPLEX
中文描述: 多速率的電纜驅(qū)動器,音頻多路復(fù)用器和ClockCleaner⑩串行
文件頁數(shù): 66/114頁
文件大?。?/td> 1224K
代理商: GS1582-IBE3
GS1582 Data Sheet
40117 - 1 November 2007
66 of 114
4.9.3 Video Standard Indication
The value reported in the VD_STD[4:0] bits of the VIDEO_STANDARD register
corresponds to the SMPTE standards as shown in
Table 4-34
.
In addition to the 5-bit video standard code word, the VIDEO_STANDARD register
also contains two status bits. The STD_LOCK bit will be set HIGH whenever the
device has achieved full synchronization. The INT_PROG bit will be set LOW if the
detected video standard is progressive and HIGH if the detected video standard is
interlaced.
The VD_STD[4:0], STD_LOCK and INT_PROG bits of the VIDEO_STANDARD
register will default to zero after device reset. The VD_STD[4:0] and INT_PROG
bits will also default to zero if the SMPTE_BYPASS pin is asserted LOW. The
STD_LOCK bit will retain its previous value if the PCLK is removed.
Table 4-32: Host Interface Description for Video Standard Register
Register Name
Bit
Name
Description
R/W
Default
VIDEO_STANDARD
Address: 004h
15
Not Used.
14-10
VD_STD[4:0]
Video Data Standard (see
Table 4-34
).
R
0
9
INT_PROG
Interlace/Progressive: Set LOW if detected video
standard is PROGRESSIVE and is set HIGH if it is
INTERLACED.
R
0
8
STD_LOCK
Standard Lock: Set HIGH when the device has
achieved full synchronization.
R
0
7-0
Not Used.
Table 4-33: Host Interface Description for Raster Structure Registers
Register Name
Bit
Name
Description
R/W
Default
RASTER_STRUCTURE1
Address: 00Eh
15-12
Not Used.
11-0
RASTER_STRUCTURE_1[11:0]
Words Per Active Line
R
0
RASTER_STRUCTURE2
Address: 00Fh
15-13
Not Used.
12-0
RASTER_STRUCTURE_2[12:0]
Words Per Total Line.
R
0
RASTER_STRUCTURE3
Address: 010h
15-11
Not Used.
10-0
RASTER_STRUCTURE_3[10:0]
Total Lines Per Frame
R
0
RASTER_STRUCTURE4
Address: 011h
15-11
Not Used.
10-0
RASTER_STRUCTURE_4[10:0]
Active Lines Per Field
R
0
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