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參數(shù)資料
| 型號(hào)： | DS34S132GN+ |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 181/194頁(yè) |
| 文件大小： | 0K |
| 描述： | IC TDM OVER PACKET 676-BGA |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 40 |
| 功能： | TDM-over-Packet（TDMoP） |
| 接口： | TDMoP |
| 電路數(shù)： | 1 |
| 電源電壓： | 1.8V, 3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 676-BGA |
| 供應(yīng)商設(shè)備封裝： | 676-PBGA（27x27） |
| 包裝： | 管件 |
| 其它名稱： | 90-34S13+2N0 |
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DS34S132 DATA SHEET
19-4750; Rev 1; 07/11
87 of 194
G. Field
Name
Addr (A:)
Bit [x:y] Type
Description
JBS
[6] ros-_-i1
Jitter Buffer Status = “1” indicates one or more Jitter Buffer Status bits are “1”
(G.GSR6). The combination of JBS = 1 and G.GSRIE1.JBIE = 1 forces an
interrupt on INT_N.
PS
[5] ros-_-i1
Port Status = “1” indicates one or more TDM Per Port Status bits are “1”
(G.GSR4). The combination of PS = 1 and G.GSRIE1.PIE = 1 forces an interrupt
on INT_N.
PCS
[4] ros-_-i1
Packet Classifier Status = “1” indicates one or more Packet Classifier special
event/errors have been detected (PC.SRL) and enabled (PC. SRIE). An interrupt
is generated on INT_N when PCS = 1 and G.GSRIE1.PCIE = 1.
EMIS
[3] ros-_-i1
External Memory Interface Status = “1” indicates one or more SDRAM Queue
Errors have been detected (EMI.BMSRL) and enabled (EMI.BMSRIE). An
interrupt is generated on INT_N when EMIS = 1 and G.GSRIE1.EMIIE = 1.
RSVD
[2]
Reserved.
EMAWS
[1] ros-_-i1
External Memory Access Write Status = “1” indicates one or more TXP CPU
Packet Write Status Latch bits = “1” (EMA.WSRL1) and enabled (EMA.WSRIE1).
The combination of EMAWS = 1 and G.GSRIE1.EMAWIE = 1 forces an interrupt
on INT_N.
EMARS
[0] ros-_-i1
External Memory Access Read Status = “1” indicates one or more RXP CPU
Packet Read Status Latch bits = “1” (EMA.RSRL1) and enabled (EMA.RSRIE1).
The combination of EMARS = 1 and G.GSRIE1.EMARIE = 1 forces an interrupt
on INT_N.
GSR2.
A:0034h
Global Status Register 2. Default: 0x00.00.00.00
PPTCSL
[31:0] rls-crw-i3
Per-Port Transmit (RXP) CAS Latched Status = “1” in PPTCSL bit position “x”
(x = 0 to 31) indicates one or more received RXP CAS Codes for Transmit TDM
Port “x” have changed. The combination of any PPTCSL[x] = 1 and its associated
G.GSRIE2.PPTCSIE[x] = 1 will make G.GSR1.PTCS = 1.
GSR3.
A:0038h
Global Status Register 3. Default: 0x00.00.00.00
PPRCSL
[31:0] rls-crw-i3
Per-Port Receive (TXP) CAS Latched Status = “1” in PPRCSL bit position “x” (x
= 0 to 31) indicates one or more CAS Codes received from TDM Port “x” have
changed (TXP direction). The combination of any PPRCSL[x] = 1 and its
associated G.GSRIE3.PPRCSIE[x] = 1 will make G.GSR1.PRCS = 1.
GSR4.
A:003Ch
Global Status Register 4. Default: 0x00.00.00.00
PPS
[31:0] ros-crw-i2
Per-Port Latched Status = “1” in PPS bit “x” (x = 0 to 31) indicates one or more
Frame Alignment or Over/underrun errors have been detected at TDM Port “x”
(any “Pn.PTSRL[z] and Pn.PTSRIE[z]” = 1 or any “Pn.PRSRL[z] and
Pn.PTSRIE[z]” = 1; where “Pn” = “Port x” and z = bit 0 or bit 1). This is a latched
status register, which means a 0 to 1 transition on any associated
PTSRL[z]/PRSRL[z] forces a latched PPS=1. The G.GCR.LSBCRE register
selects whether a Read or Write operation to GSR4 clears the register (-crw-;
even if all PTSRL[z]/PRSRL[z] transition back to “0”, a PPS[x] = 1 value will not
clear until GSR4 is cleared by a Read or Write operation). Any PPS[x] = 1 will
force G.GSR1.PS = 1.
GSR5.
A:0040h
Global Status Register 5. Default: 0x00.00.00.00
BGS
[31:0] ros-_-i2
Bundle Group Status = “1” in BGS bit position “x” (x = 0 to 31) indicates one or
more PW Control Word changes have been detected in Bundle Group “x” (any
B.GxSRL[z] = 1 and B.GxSRIE[z] = 1 for z = 0 to 7). Bundles with a detected
change can be identified from: Bundle # = BGS “x” bit position x 8 + B.GxSRL “z”
bit position. Any BGS[x] = 1 (x = 0 to 31) will force G.GSR1.BS = 1.
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| DS34S132GN+ | 功能描述:通信集成電路 - 若干 32Port TDM-Over-Pack Transport Device RoHS:否 制造商:Maxim Integrated 類型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
| DS34S132GNA2+ | 功能描述:通信集成電路 - 若干 32Port TDM-Over-Pack Transport Device RoHS:否 制造商:Maxim Integrated 類型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
| DS34T101 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single/Dual/Quad/Octal TDM-over-Packet Chip |
| DS34T101_08 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single/Dual/Quad/Octal TDM-over-Packet Chip |
| DS34T101_09 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single/Dual/Quad/Octal TDM-over-Packet Chip |
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