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參數(shù)資料
| 型號(hào)： | DS34S132GN+ |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 13/194頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC TDM OVER PACKET 676-BGA |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 40 |
| 功能： | TDM-over-Packet（TDMoP） |
| 接口： | TDMoP |
| 電路數(shù)： | 1 |
| 電源電壓： | 1.8V, 3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 676-BGA |
| 供應(yīng)商設(shè)備封裝： | 676-PBGA（27x27） |
| 包裝： | 管件 |
| 其它名稱(chēng)： | 90-34S13+2N0 |
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DS34S132 DATA SHEET
19-4750; Rev1; 7/11
11 of 194
4
HIGH LEVEL DESCRIPTION
To implement a PW (tunnel) across a PSN requires a PW termination point at each end of the PW (tunnel). Each
terminating point provides the PW encapsulation functions that are required to enter the PSN (for one direction of
data) and the PW de-encapsulation functions to restore the data to its original (non-PW) format (for the opposite
direction). The two data directions at each termination point can be can be described as the “transmit PW packet
direction” (TXP) and the “receive PW packet direction” (RXP).
The DS34S132 TDMoP device implements the complete, bi-directional PW termination point encapsulation
functions for TDMoP and HDLC PWs. The DS34S132 is a high density solution that can terminate up to 256 PWs
that are associated with up to 32 T1/E1 data streams and aggregate that traffic for transmission over a single
100/1000 Mb/s Ethernet data stream. The DS34S132 can encap/decap TDMoP and HDLC PWs into the following
PSN protocols: L2TPv3/IPv4, L2TPv3/IPv6, UDP/IPv4, UDP/IPv6, Metro Ethernet (MEF-8) and MPLS (MFA-8).
For TDMoP PWs the DS34S132 supports the SAToP and CESoPSN payload formats. SAToP is used for
Unstructured TDM transport, where an entire T1/E1 including the framing pattern (if it exists) is transferred
transparently as a series of unformatted bytes of data in the PW payload without regard to any bit, byte and/or
frame alignment that may exist in the TDM data stream. The DS34S132 can support Unstructured T1, E1 or
slower TDM data streams (any bit rate less than or equal to 2.048 Mb/s).
CESoPSN is used for Structured TDM transport where the PW packet payload is synchronized to the T1/E1
framing. With CESoPSN the T1/E1 framing pattern is commonly not passed across the PW (removed) because the
structured PW format enables the framing information to be conveyed through the PW mechanisms. The opposite
end generates the T1/E1 framing pattern from the PWs payload structure. This payload format can be used when
the TDM service (e.g. voice) requires the ability to interpret, and/or terminate some functional aspects of the T1/E1
signal (e.g. identify DS0s within the T1/E1). PWs with the Structured payload format can support Nx64 Kb/s,
fractional T1/E1 (T1: N = 1 – 24; E1: N = 1 – 32). In some applications, a T1/E1 can be divided into multiple Nx64
blocks (M x N x 64; M = the number of fractional blocks) and the PSN can be used as a “distributed cross-connect”
to implement a point to multi-point topology forwarding some Nx64 blocks to one end point and other Nx64 blocks
to other end points (T1: M = 1 – 24; E1: M = 1 – 32; e.g. for E1: 32 x 1 x 64).
The CESoPSN Structured format can also convey CAS Signaling across a PW through the use of a sub-channel
within the CESoPSN PW packets. The DS34S132 enables the CAS Signaling to be transparently passed,
monitored by an external CPU, and/or terminated by an external CPU, all on a per Timeslot and per direction basis.
The DS34S132 allows each TDM Port to independently support asynchronous or synchronous TDM data streams.
Each TDM Port has a Clock Recovery Engine to regenerate the timing from a TDMoP PW packet data stream. For
applications that do not require clock recovery the DS34S132 also provides several external clocking options.
The Clock Recovery Engines support Differential Clock Recovery (DCR) and Adaptive Clock Recovery (ACR).
DCR can be used when a common clock is available at both ends of the PW (e.g. BITS clock for the public network
or GPS for the mobile cellular network) and requires that the PW use RTP Timestamps to convey the TDM timing
information. Adaptive Clock Recovery does not use Timestamps but instead regenerates the timing based on the
TDMoP PW packet transmission rate. The DS34S132 high performance clock recovery circuits enable the use of
PWs in the public network by achieving the stringent jitter and wander performance requirements of ITU-T
G.823/824/8261, even for networks that impose large packet delay variation (PDV) and packet loss. For far end
clock recovery, the DS34S132 can generate two Timestamp formats - Absolute and Differential Timestamps.
PWs can be used to transport HDLC packet data. The DS34S132 can forward HDLC encapsulated data
transparently using a TDMoP PW (as described above; idle HDLC Flags are forwarded with the data) or by first
extracting the data from the HDLC coding and then only forwarding the non-idle data in an HDLC PW. The HDLC
PW is useful for HDLC data streams where a significant portion of the data stream is filled with HDLC Idle Flags.
For example, if a 64 Kb/s TDM Timeslot is used to carry 4 Kb/s of HDLC data then it may be more bandwidth
efficient to extract the payload data from the HDLC encoding and forward the data over an HDLC PW. The
DS34S132 incorporates 256 HDLC Engines so that any PW can be assigned as a TDMoP PW or an HDLC PW.
PW Termination points often must also terminate OAM and Signaling packet data streams. To support this need
the DS34S132 enables an external CPU to terminate several OAM and Signaling types including: PW In-band
VCCV OAM, PW UDP-specific (Out-band VCCV) OAM, MEF OAM, Ethernet Broadcast frames, ARP, IPv6 NDP
and includes a user specified CPU-destination Ethernet Type. The DS34S132 can also be programmed to forward
packets to the CPU that match specialized conditions for debug or other purposes (e.g. wrong IP DA).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| DS34S132GN+ | 功能描述:通信集成電路 - 若干 32Port TDM-Over-Pack Transport Device RoHS:否 制造商:Maxim Integrated 類(lèi)型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
| DS34S132GNA2+ | 功能描述:通信集成電路 - 若干 32Port TDM-Over-Pack Transport Device RoHS:否 制造商:Maxim Integrated 類(lèi)型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
| DS34T101 | 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:Single/Dual/Quad/Octal TDM-over-Packet Chip |
| DS34T101_08 | 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:Single/Dual/Quad/Octal TDM-over-Packet Chip |
| DS34T101_09 | 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:Single/Dual/Quad/Octal TDM-over-Packet Chip |
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